No description
d53c6c168a
Mostly a matter of keeping prefetches to invalid addrs
from messing up VM IPRs. Also discovered that wh64s were
not being treated as prefetches, when they really should be
(for the most part, anyway).
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
- Add NO_FAULT MemReq flag to indicate references that should not
cause page faults (i.e., prefetches).
arch/alpha/ev5.cc:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
- Add Fault trace flag.
arch/alpha/isa_desc:
- Add NO_FAULT MemReq flag to indicate references that should not
cause page faults (i.e., prefetches).
- Mark wh64 as a "data prefetch" instruction so it gets controlled
properly by the FullCPU data prefetch control switch.
- Align wh64 EA in decoder so issue stage doesn't need to worry about it.
arch/alpha/isa_traits.hh:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
base/traceflags.py:
- Add Fault trace flag.
cpu/simple_cpu/simple_cpu.hh:
- Pass MemReq flags to writeHint() operation.
cpu/static_inst.hh:
Update comment re: prefetches.
--HG--
extra : convert_revision : 62e466b0f4c0ff9961796270fa2e371ec24bcbb6
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| README | ||
This is release m5_1.0_beta1 of the M5 simulator. This file contains brief "getting started" information and release notes. For more information, see http://m5.eecs.umich.edu. If you have questions, please send mail to m5sim-users@lists.sourceforge.net. WHAT'S INCLUDED (AND NOT) ------------------------- Since you're reading this file, presumably you've managed to untar the distribution. The archive you've unpacked has three subdirectories: - m5: the simulator itself - m5-test: regression tests and scripts to run them - ext: less-common external packages needed to build m5 (currently just "ply") Although M5 is capable of full-system simulation, the only OS it currently supports is the proprietary Compaq/HP Tru64 version of Unix. We are thus unable to distribute bootable disk images freely. If you have a Tru64 license and are interested in obtaining disk images, contact us at m5-dev@eecs.umich.edu. GETTING STARTED --------------- The following steps will build and test the simulator. The variable "$top" refers to the top directory where you've unpacked the files, i.e., the one containing the m5, m5-test, and ext directories. cd $top/m5/setup ./setup ALPHA # set up build/ALPHA directory cd $top/m5/build/ALPHA make m5.opt # use "-j N" if you've got an MP system # wait for build... cd $top/m5-test ./do-tests.pl -B ALPHA # test what you just built # wait for tests to run... # should end with "finished do-tests successfully!" If you run into errors regarding m5/arch/alpha/decoder.cc, just "touch" that file to update its timestamp. This file is generated from a compact ISA description using a program written in Python. If you have Python 2.2.2 or later installed on your system, you should be able to generate it yourself, but if you don't have Python (or have an older version), you may run in to trouble. Since we've shipped a working copy of decoder.cc, it's not necessary to have Python to build M5 (unless you start modifying the ISA decription). Unfortunately, sometimes make gets confused and tries to do so anyway. The "touch" should convince make to stop trying.