gem5/sim/eventq.hh
Steve Reinhardt ad8b9636f8 Many files:
Update copyright dates and author list

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
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base/pollevent.cc:
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base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
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base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
build/SConstruct:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/memtest/memtest.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunamireg.h:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/linux_threadinfo.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
python/SConscript:
python/m5/__init__.py:
python/m5/config.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/genini.py:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/ccdrv/devtime.c:
util/m5/m5.c:
util/oprofile-top.py:
util/rundiff:
util/m5/m5op.h:
util/m5/m5op.s:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
util/tap/tap.cc:
    Update copyright dates and author list

--HG--
extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
2005-06-05 05:16:00 -04:00

408 lines
11 KiB
C++

/*
* Copyright (c) 2000-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* @file
* EventQueue interfaces
*/
#ifndef __SIM_EVENTQ_HH__
#define __SIM_EVENTQ_HH__
#include <assert.h>
#include <algorithm>
#include <map>
#include <string>
#include <vector>
#include "sim/host.hh" // for Tick
#include "base/fast_alloc.hh"
#include "base/trace.hh"
#include "sim/serialize.hh"
class EventQueue; // forward declaration
//////////////////////
//
// Main Event Queue
//
// Events on this queue are processed at the *beginning* of each
// cycle, before the pipeline simulation is performed.
//
// defined in eventq.cc
//
//////////////////////
extern EventQueue mainEventQueue;
/*
* An item on an event queue. The action caused by a given
* event is specified by deriving a subclass and overriding the
* process() member function.
*/
class Event : public Serializable, public FastAlloc
{
friend class EventQueue;
private:
/// queue to which this event belongs (though it may or may not be
/// scheduled on this queue yet)
EventQueue *queue;
Event *next;
Tick _when; //!< timestamp when event should be processed
int _priority; //!< event priority
char _flags;
protected:
enum Flags {
None = 0x0,
Squashed = 0x1,
Scheduled = 0x2,
AutoDelete = 0x4,
AutoSerialize = 0x8
};
bool getFlags(Flags f) const { return (_flags & f) == f; }
void setFlags(Flags f) { _flags |= f; }
void clearFlags(Flags f) { _flags &= ~f; }
protected:
EventQueue *theQueue() const { return queue; }
#if TRACING_ON
Tick when_created; //!< Keep track of creation time For debugging
Tick when_scheduled; //!< Keep track of creation time For debugging
virtual void trace(const char *action); //!< trace event activity
#else
void trace(const char *) {}
#endif
unsigned annotated_value;
public:
/// Event priorities, to provide tie-breakers for events scheduled
/// at the same cycle. Most events are scheduled at the default
/// priority; these values are used to control events that need to
/// be ordered within a cycle.
enum Priority {
/// Breakpoints should happen before anything else, so we
/// don't miss any action when debugging.
Debug_Break_Pri = -100,
/// For some reason "delayed" inter-cluster writebacks are
/// scheduled before regular writebacks (which have default
/// priority). Steve?
Delayed_Writeback_Pri = -1,
/// Default is zero for historical reasons.
Default_Pri = 0,
/// CPU switches schedule the new CPU's tick event for the
/// same cycle (after unscheduling the old CPU's tick event).
/// The switch needs to come before any tick events to make
/// sure we don't tick both CPUs in the same cycle.
CPU_Switch_Pri = 31,
/// Serailization needs to occur before tick events also, so
/// that a serialize/unserialize is identical to an on-line
/// CPU switch.
Serialize_Pri = 32,
/// CPU ticks must come after other associated CPU events
/// (such as writebacks).
CPU_Tick_Pri = 50,
/// Statistics events (dump, reset, etc.) come after
/// everything else, but before exit.
Stat_Event_Pri = 90,
/// If we want to exit on this cycle, it's the very last thing
/// we do.
Sim_Exit_Pri = 100
};
/*
* Event constructor
* @param queue that the event gets scheduled on
*/
Event(EventQueue *q, Priority p = Default_Pri)
: queue(q), next(NULL), _priority(p), _flags(None),
#if TRACING_ON
when_created(curTick), when_scheduled(0),
#endif
annotated_value(0)
{
}
~Event() {}
virtual const std::string name() const {
return csprintf("Event_%x", (uintptr_t)this);
}
/// Determine if the current event is scheduled
bool scheduled() const { return getFlags(Scheduled); }
/// Schedule the event with the current priority or default priority
void schedule(Tick t);
/// Reschedule the event with the current priority
void reschedule(Tick t);
/// Remove the event from the current schedule
void deschedule();
/// Return a C string describing the event. This string should
/// *not* be dynamically allocated; just a const char array
/// describing the event class.
virtual const char *description();
/// Dump the current event data
void dump();
/*
* This member function is invoked when the event is processed
* (occurs). There is no default implementation; each subclass
* must provide its own implementation. The event is not
* automatically deleted after it is processed (to allow for
* statically allocated event objects).
*
* If the AutoDestroy flag is set, the object is deleted once it
* is processed.
*/
virtual void process() = 0;
void annotate(unsigned value) { annotated_value = value; };
unsigned annotation() { return annotated_value; }
/// Squash the current event
void squash() { setFlags(Squashed); }
/// Check whether the event is squashed
bool squashed() { return getFlags(Squashed); }
/// Get the time that the event is scheduled
Tick when() const { return _when; }
/// Get the event priority
int priority() const { return _priority; }
struct priority_compare :
public std::binary_function<Event *, Event *, bool>
{
bool operator()(const Event *l, const Event *r) const {
return l->when() >= r->when() || l->priority() >= r->priority();
}
};
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);
};
template <class T, void (T::* F)()>
void
DelayFunction(Tick when, T *object)
{
class DelayEvent : public Event
{
private:
T *object;
public:
DelayEvent(Tick when, T *o)
: Event(&mainEventQueue), object(o)
{ setFlags(this->AutoDestroy); schedule(when); }
void process() { (object->*F)(); }
const char *description() { return "delay"; }
};
new DelayEvent(when, object);
}
template <class T, void (T::* F)()>
class EventWrapper : public Event
{
private:
T *object;
public:
EventWrapper(T *obj, bool del = false, EventQueue *q = &mainEventQueue,
Priority p = Default_Pri)
: Event(q, p), object(obj)
{
if (del)
setFlags(AutoDelete);
}
void process() { (object->*F)(); }
};
/*
* Queue of events sorted in time order
*/
class EventQueue : public Serializable
{
protected:
std::string objName;
private:
Event *head;
void insert(Event *event);
void remove(Event *event);
public:
// constructor
EventQueue(const std::string &n)
: objName(n), head(NULL)
{}
virtual const std::string name() const { return objName; }
// schedule the given event on this queue
void schedule(Event *ev);
void deschedule(Event *ev);
void reschedule(Event *ev);
Tick nextTick() { return head->when(); }
void serviceOne();
// process all events up to the given timestamp. we inline a
// quick test to see if there are any events to process; if so,
// call the internal out-of-line version to process them all.
void serviceEvents(Tick when) {
while (!empty()) {
if (nextTick() > when)
break;
/**
* @todo this assert is a good bug catcher. I need to
* make it true again.
*/
//assert(head->when() >= when && "event scheduled in the past");
serviceOne();
}
}
// default: process all events up to 'now' (curTick)
void serviceEvents() { serviceEvents(curTick); }
// return true if no events are queued
bool empty() { return head == NULL; }
void dump();
Tick nextEventTime() { return empty() ? curTick : head->when(); }
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);
};
//////////////////////
//
// inline functions
//
// can't put these inside declaration due to circular dependence
// between Event and EventQueue classes.
//
//////////////////////
// schedule at specified time (place on event queue specified via
// constructor)
inline void
Event::schedule(Tick t)
{
assert(!scheduled());
assert(t >= curTick);
setFlags(Scheduled);
#if TRACING_ON
when_scheduled = curTick;
#endif
_when = t;
queue->schedule(this);
}
inline void
Event::deschedule()
{
assert(scheduled());
clearFlags(Squashed);
clearFlags(Scheduled);
queue->deschedule(this);
}
inline void
Event::reschedule(Tick t)
{
assert(scheduled());
clearFlags(Squashed);
#if TRACING_ON
when_scheduled = curTick;
#endif
_when = t;
queue->reschedule(this);
}
inline void
EventQueue::schedule(Event *event)
{
insert(event);
if (DTRACE(Event))
event->trace("scheduled");
}
inline void
EventQueue::deschedule(Event *event)
{
remove(event);
if (DTRACE(Event))
event->trace("descheduled");
}
inline void
EventQueue::reschedule(Event *event)
{
remove(event);
insert(event);
if (DTRACE(Event))
event->trace("rescheduled");
}
#endif // __SIM_EVENTQ_HH__