6b4396111b
cpu/static_inst.hh: Updates for new CPU, also include a classification of quiesce instructions. --HG-- extra : convert_revision : a34cd56da88fe57d7de24674fbb375bbf13f887f
75 lines
2.7 KiB
C++
75 lines
2.7 KiB
C++
/*
|
|
* Copyright (c) 2006 The Regents of The University of Michigan
|
|
* All rights reserved.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions are
|
|
* met: redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer;
|
|
* redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution;
|
|
* neither the name of the copyright holders nor the names of its
|
|
* contributors may be used to endorse or promote products derived from
|
|
* this software without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
*/
|
|
|
|
#ifndef __CPU_OZONE_OZONE_IMPL_HH__
|
|
#define __CPU_OZONE_OZONE_IMPL_HH__
|
|
|
|
#include "arch/alpha/isa_traits.hh"
|
|
#include "cpu/o3/bpred_unit.hh"
|
|
#include "cpu/ozone/back_end.hh"
|
|
#include "cpu/ozone/front_end.hh"
|
|
#include "cpu/ozone/inst_queue.hh"
|
|
#include "cpu/ozone/lsq_unit.hh"
|
|
#include "cpu/ozone/lw_lsq.hh"
|
|
#include "cpu/ozone/lw_back_end.hh"
|
|
#include "cpu/ozone/null_predictor.hh"
|
|
#include "cpu/ozone/dyn_inst.hh"
|
|
#include "cpu/ozone/simple_params.hh"
|
|
|
|
template <class Impl>
|
|
class OzoneCPU;
|
|
|
|
template <class Impl>
|
|
class OzoneDynInst;
|
|
|
|
struct OzoneImpl {
|
|
typedef SimpleParams Params;
|
|
typedef OzoneCPU<OzoneImpl> OzoneCPU;
|
|
typedef OzoneCPU FullCPU;
|
|
|
|
// Would like to put these into their own area.
|
|
// typedef NullPredictor BranchPred;
|
|
typedef TwobitBPredUnit<OzoneImpl> BranchPred;
|
|
typedef FrontEnd<OzoneImpl> FrontEnd;
|
|
// Will need IQ, LSQ eventually
|
|
typedef LWBackEnd<OzoneImpl> BackEnd;
|
|
|
|
typedef InstQueue<OzoneImpl> InstQueue;
|
|
typedef OzoneLWLSQ<OzoneImpl> LdstQueue;
|
|
|
|
typedef OzoneDynInst<OzoneImpl> DynInst;
|
|
typedef RefCountingPtr<DynInst> DynInstPtr;
|
|
|
|
typedef uint64_t IssueStruct;
|
|
|
|
enum {
|
|
MaxThreads = 1
|
|
};
|
|
};
|
|
|
|
#endif // __CPU_OZONE_OZONE_IMPL_HH__
|