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gem5/src/gpu-compute
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Tony Gutierrez d327cdba07 gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 
the GPUISA class is meant to encapsulate any ISA-specific behavior - special
register accesses, isa-specific WF/kernel state, etc. - in a generic enough
way so that it may be used in ISA-agnostic code.

gpu-compute: use the GPUISA object to advance the PC

the GPU model treats the PC as a pointer to individual instruction objects -
which are store in a contiguous array - and not a byte address to be fetched
from the real memory system. this is ok for HSAIL because all instructions
are considered by the model to be the same size.

in machine ISA, however, instructions may be 32b or 64b, and branches are
calculated by advancing the PC by the number of words (4 byte chunks) it
needs to advance in the real instruction stream. because of this there is
a mismatch between the PC we use to index into the instruction array, and
the actual byte address PC the ISA expects. here we move the PC advance
calculation to the ISA so that differences in the instrucion sizes may be
accounted for in generic way.
2016-10-26 22:47:38 -04:00
..
brig_object.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
brig_object.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
cl_driver.cc gpu-compute: Adding ioctl for HW context size 2016-09-16 12:27:56 -04:00
cl_driver.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
cl_event.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
compute_unit.cc gpu-compute: add instruction mix stats for the gpu 2016-10-26 22:47:30 -04:00
compute_unit.hh gpu-compute: add instruction mix stats for the gpu 2016-10-26 22:47:30 -04:00
condition_register_state.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
condition_register_state.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
dispatcher.cc gpu-compute: fix typo in GPUDispatcher 2016-09-16 14:47:19 -04:00
dispatcher.hh gpu-compute: Adding ioctl for HW context size 2016-09-16 12:27:56 -04:00
exec_stage.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
exec_stage.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
fetch_stage.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
fetch_stage.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
fetch_unit.cc gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
fetch_unit.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
global_memory_pipeline.cc hsail, gpu-compute: remove doGm/SmReturn add completeAcc 2016-10-26 22:47:19 -04:00
global_memory_pipeline.hh hsail, gpu-compute: remove doGm/SmReturn add completeAcc 2016-10-26 22:47:19 -04:00
GPU.py gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
gpu_dyn_inst.cc hsail, gpu-compute: remove doGm/SmReturn add completeAcc 2016-10-26 22:47:19 -04:00
gpu_dyn_inst.hh hsail, gpu-compute: remove doGm/SmReturn add completeAcc 2016-10-26 22:47:19 -04:00
gpu_exec_context.cc gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
gpu_exec_context.hh gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
gpu_static_inst.cc gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
gpu_static_inst.hh gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
gpu_tlb.cc stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
gpu_tlb.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPUStaticInstFlags.py gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
hsa_code.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
hsa_kernel_info.hh gpu-compute: Adding ioctl for HW context size 2016-09-16 12:27:56 -04:00
hsa_object.cc gpu-compute: remove brig_object.hh from hsa_object.cc 2016-02-17 11:46:02 -05:00
hsa_object.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
hsail_code.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
hsail_code.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
kernel_cfg.cc gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
kernel_cfg.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
lds_state.cc gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
lds_state.hh gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
LdsState.py gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
local_memory_pipeline.cc hsail, gpu-compute: remove doGm/SmReturn add completeAcc 2016-10-26 22:47:19 -04:00
local_memory_pipeline.hh hsail, gpu-compute: remove doGm/SmReturn add completeAcc 2016-10-26 22:47:19 -04:00
misc.hh gpu-compute: parametrize Wavefront size 2016-06-09 11:24:55 -04:00
ndrange.hh mem: Remove threadId from memory request class 2016-04-07 09:30:20 -05:00
of_scheduling_policy.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
of_scheduling_policy.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
pool_manager.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
pool_manager.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
qstruct.hh gpu-compute: Remove WFContext 2016-09-16 12:26:03 -04:00
rr_scheduling_policy.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
rr_scheduling_policy.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
schedule_stage.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
schedule_stage.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
scheduler.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
scheduler.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
scheduling_policy.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
SConscript gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
scoreboard_check_stage.cc gpu-compute: remove unused variable from scoreboard check stage 2016-03-21 11:26:23 -04:00
scoreboard_check_stage.hh gpu-compute: remove unused variable from scoreboard check stage 2016-03-21 11:26:23 -04:00
shader.cc mem: Remove threadId from memory request class 2016-04-07 09:30:20 -05:00
shader.hh gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
simple_pool_manager.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
simple_pool_manager.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
tlb_coalescer.cc stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
tlb_coalescer.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
vector_register_file.cc gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
vector_register_file.hh gpu-compute: Adding vector register file debug messages 2016-09-16 12:30:05 -04:00
vector_register_state.cc gpu-compute: parametrize Wavefront size 2016-06-09 11:24:55 -04:00
vector_register_state.hh gpu-compute: parametrize Wavefront size 2016-06-09 11:24:55 -04:00
wavefront.cc gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
wavefront.hh gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
X86GPUTLB.py gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00