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gem5
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d2ccf5e509
gem5
/
src
/
arch
/
x86
/
isa
/
microops
History
Gabe Black
d2ccf5e509
More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction.
...
--HG-- extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
2007-06-19 22:40:10 +00:00
..
base.isa
Move load/store microops into their own file. They still don't do anything, though.
2007-06-13 18:05:08 +00:00
ldstop.isa
Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
2007-06-19 14:18:25 +00:00
limmop.isa
Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly.
2007-06-18 14:15:00 +00:00
microops.isa
Move load/store microops into their own file. They still don't do anything, though.
2007-06-13 18:05:08 +00:00
regop.isa
More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction.
2007-06-19 22:40:10 +00:00
specop.isa
Renovate the "fault" microop implementation.
2007-06-19 14:50:35 +00:00