98 lines
10 KiB
Plaintext
98 lines
10 KiB
Plaintext
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---------- Begin Simulation Statistics ----------
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sim_seconds 0.000053 # Number of seconds simulated
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sim_ticks 52575 # Number of ticks simulated
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final_tick 52575 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000 # Frequency of simulated ticks
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host_inst_rate 13619 # Simulator instruction rate (inst/s)
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host_op_rate 13618 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 277801 # Simulator tick rate (ticks/s)
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host_mem_usage 149308 # Number of bytes of host memory used
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host_seconds 0.19 # Real time elapsed on the host
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sim_insts 2577 # Number of instructions simulated
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sim_ops 2577 # Number of ops (including micro ops) simulated
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system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads
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system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes
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system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
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system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
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system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_reads 0 # number of data array reads
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system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_writes 0 # number of data array writes
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system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.ruby.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed
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system.ruby.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
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system.ruby.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made
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system.ruby.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
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system.ruby.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
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system.ruby.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed
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system.ruby.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
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system.ruby.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages
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system.ruby.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
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system.cpu.dtb.fetch_hits 0 # ITB hits
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system.cpu.dtb.fetch_misses 0 # ITB misses
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system.cpu.dtb.fetch_acv 0 # ITB acv
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system.cpu.dtb.fetch_accesses 0 # ITB accesses
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system.cpu.dtb.read_hits 415 # DTB read hits
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system.cpu.dtb.read_misses 4 # DTB read misses
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system.cpu.dtb.read_acv 0 # DTB read access violations
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system.cpu.dtb.read_accesses 419 # DTB read accesses
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system.cpu.dtb.write_hits 294 # DTB write hits
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system.cpu.dtb.write_misses 4 # DTB write misses
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system.cpu.dtb.write_acv 0 # DTB write access violations
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system.cpu.dtb.write_accesses 298 # DTB write accesses
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system.cpu.dtb.data_hits 709 # DTB hits
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system.cpu.dtb.data_misses 8 # DTB misses
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system.cpu.dtb.data_acv 0 # DTB access violations
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system.cpu.dtb.data_accesses 717 # DTB accesses
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system.cpu.itb.fetch_hits 2586 # ITB hits
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system.cpu.itb.fetch_misses 11 # ITB misses
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system.cpu.itb.fetch_acv 0 # ITB acv
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system.cpu.itb.fetch_accesses 2597 # ITB accesses
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system.cpu.itb.read_hits 0 # DTB read hits
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system.cpu.itb.read_misses 0 # DTB read misses
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system.cpu.itb.read_acv 0 # DTB read access violations
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system.cpu.itb.read_accesses 0 # DTB read accesses
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system.cpu.itb.write_hits 0 # DTB write hits
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system.cpu.itb.write_misses 0 # DTB write misses
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system.cpu.itb.write_acv 0 # DTB write access violations
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system.cpu.itb.write_accesses 0 # DTB write accesses
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system.cpu.itb.data_hits 0 # DTB hits
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system.cpu.itb.data_misses 0 # DTB misses
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system.cpu.itb.data_acv 0 # DTB access violations
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system.cpu.itb.data_accesses 0 # DTB accesses
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system.cpu.workload.num_syscalls 4 # Number of system calls
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system.cpu.numCycles 52575 # number of cpu cycles simulated
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system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
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system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
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system.cpu.committedInsts 2577 # Number of instructions committed
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system.cpu.committedOps 2577 # Number of ops (including micro ops) committed
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system.cpu.num_int_alu_accesses 2375 # Number of integer alu accesses
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system.cpu.num_fp_alu_accesses 6 # Number of float alu accesses
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system.cpu.num_func_calls 140 # number of times a function call or return occured
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system.cpu.num_conditional_control_insts 238 # number of instructions that are conditional controls
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system.cpu.num_int_insts 2375 # number of integer instructions
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system.cpu.num_fp_insts 6 # number of float instructions
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system.cpu.num_int_register_reads 2998 # number of times the integer registers were read
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system.cpu.num_int_register_writes 1768 # number of times the integer registers were written
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system.cpu.num_fp_register_reads 6 # number of times the floating registers were read
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system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
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system.cpu.num_mem_refs 717 # number of memory refs
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system.cpu.num_load_insts 419 # Number of load instructions
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system.cpu.num_store_insts 298 # Number of store instructions
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system.cpu.num_idle_cycles 0 # Number of idle cycles
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system.cpu.num_busy_cycles 52575 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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---------- End Simulation Statistics ----------
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