Andreas Hansson 1c321b8847 Regression: Use CPU clock and 32-byte width for L1-L2 bus ... This patch changes the CoherentBus between the L1s and L2 to use the CPU clock and also four times the width compared to the default bus. The parameters are not intending to fit every single scenario, but rather serve as a better startingpoint than what we previously had. Note that the scripts that do not use the addTwoLevelCacheHiearchy are not affected by this change. A separate patch will update the stats.		2012-10-15 08:08:08 -04:00
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boot	configs: add run scripts for ics/gb versions of android and bbench	2012-06-11 11:07:42 -04:00
common	Regression: Use CPU clock and 32-byte width for L1-L2 bus	2012-10-15 08:08:08 -04:00
example	Configs: SE script fix for Alpha and Ruby simulations	2012-09-28 09:35:25 -04:00
ruby	ruby: changes to simple network	2012-10-02 14:35:45 -05:00
splash2	Bus: Split the bus into a non-coherent and coherent bus	2012-05-31 13:30:04 -04:00
topologies	Ruby: Clean up topology changes	2012-08-10 13:50:42 -05:00