50ef39af82
When invoking several copies of m5 on the same machine at the same time, there can be a race for TCP ports for the terminal connections or remote gdb. Expose a function to disable those ports, and have the regression scripts disable them. There are some SimObjects that have no other function than to be used with ports (NativeTrace and EtherTap), so they will panic if the ports are disabled.
225 lines
7.3 KiB
C++
225 lines
7.3 KiB
C++
/*
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* Copyright (c) 2001-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Steve Reinhardt
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* Lisa Hsu
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* Nathan Binkert
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* Steve Raasch
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*/
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#include <errno.h>
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#include "arch/regfile.hh"
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#include "arch/utility.hh"
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#include "base/loader/symtab.hh"
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#include "base/socket.hh"
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#include "cpu/nativetrace.hh"
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#include "cpu/static_inst.hh"
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#include "cpu/thread_context.hh"
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#include "params/NativeTrace.hh"
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//XXX This is temporary
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#include "arch/isa_specific.hh"
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using namespace std;
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using namespace TheISA;
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namespace Trace {
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NativeTrace::NativeTrace(const Params *p)
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: InstTracer(p)
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{
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if (ListenSocket::allDisabled())
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fatal("All listeners are disabled!");
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int port = 8000;
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while(!native_listener.listen(port, true))
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{
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DPRINTF(GDBMisc, "Can't bind port %d\n", port);
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port++;
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}
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ccprintf(cerr, "Listening for native process on port %d\n", port);
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fd = native_listener.accept();
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checkRcx = true;
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checkR11 = true;
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}
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bool
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NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
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{
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if(!checkRcx)
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checkRcx = (mVal != oldRcxVal || nVal != oldRealRcxVal);
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if(checkRcx)
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return checkReg(name, mVal, nVal);
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return true;
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}
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bool
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NativeTrace::checkR11Reg(const char * name, uint64_t &mVal, uint64_t &nVal)
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{
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if(!checkR11)
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checkR11 = (mVal != oldR11Val || nVal != oldRealR11Val);
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if(checkR11)
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return checkReg(name, mVal, nVal);
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return true;
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}
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bool
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NativeTrace::checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[])
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{
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if (mXmmBuf[num * 2] != nXmmBuf[num * 2] ||
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mXmmBuf[num * 2 + 1] != nXmmBuf[num * 2 + 1]) {
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DPRINTFN("Register xmm%d should be 0x%016x%016x but is 0x%016x%016x.\n",
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num, nXmmBuf[num * 2 + 1], nXmmBuf[num * 2],
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mXmmBuf[num * 2 + 1], mXmmBuf[num * 2]);
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return false;
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}
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return true;
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}
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void
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Trace::NativeTraceRecord::dump()
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{
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//Don't print what happens for each micro-op, just print out
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//once at the last op, and for regular instructions.
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if(!staticInst->isMicroop() || staticInst->isLastMicroop())
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parent->check(thread, staticInst->isSyscall());
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}
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void
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Trace::NativeTrace::check(ThreadContext * tc, bool isSyscall)
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{
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// ostream &outs = Trace::output();
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nState.update(fd);
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mState.update(tc);
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if(isSyscall)
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{
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checkRcx = false;
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checkR11 = false;
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oldRcxVal = mState.rcx;
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oldRealRcxVal = nState.rcx;
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oldR11Val = mState.r11;
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oldRealR11Val = nState.r11;
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}
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checkReg("rax", mState.rax, nState.rax);
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checkRcxReg("rcx", mState.rcx, nState.rcx);
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checkReg("rdx", mState.rdx, nState.rdx);
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checkReg("rbx", mState.rbx, nState.rbx);
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checkReg("rsp", mState.rsp, nState.rsp);
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checkReg("rbp", mState.rbp, nState.rbp);
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checkReg("rsi", mState.rsi, nState.rsi);
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checkReg("rdi", mState.rdi, nState.rdi);
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checkReg("r8", mState.r8, nState.r8);
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checkReg("r9", mState.r9, nState.r9);
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checkReg("r10", mState.r10, nState.r10);
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checkR11Reg("r11", mState.r11, nState.r11);
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checkReg("r12", mState.r12, nState.r12);
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checkReg("r13", mState.r13, nState.r13);
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checkReg("r14", mState.r14, nState.r14);
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checkReg("r15", mState.r15, nState.r15);
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checkReg("rip", mState.rip, nState.rip);
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checkXMM(0, mState.xmm, nState.xmm);
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checkXMM(1, mState.xmm, nState.xmm);
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checkXMM(2, mState.xmm, nState.xmm);
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checkXMM(3, mState.xmm, nState.xmm);
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checkXMM(4, mState.xmm, nState.xmm);
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checkXMM(5, mState.xmm, nState.xmm);
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checkXMM(6, mState.xmm, nState.xmm);
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checkXMM(7, mState.xmm, nState.xmm);
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checkXMM(8, mState.xmm, nState.xmm);
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checkXMM(9, mState.xmm, nState.xmm);
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checkXMM(10, mState.xmm, nState.xmm);
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checkXMM(11, mState.xmm, nState.xmm);
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checkXMM(12, mState.xmm, nState.xmm);
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checkXMM(13, mState.xmm, nState.xmm);
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checkXMM(14, mState.xmm, nState.xmm);
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checkXMM(15, mState.xmm, nState.xmm);
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#if THE_ISA == SPARC_ISA
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/*for(int f = 0; f <= 62; f+=2)
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{
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uint64_t regVal;
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int res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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uint64_t realRegVal = thread->readFloatRegBits(f, 64);
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if(regVal != realRegVal)
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{
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DPRINTF(ExecRegDelta, "Register f%d should be %#x but is %#x.\n", f, regVal, realRegVal);
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}
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}*/
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uint64_t regVal;
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int res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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uint64_t realRegVal = thread->readNextPC();
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if(regVal != realRegVal)
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{
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DPRINTF(ExecRegDelta,
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"Register pc should be %#x but is %#x.\n",
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regVal, realRegVal);
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}
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res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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realRegVal = thread->readNextNPC();
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if(regVal != realRegVal)
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{
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DPRINTF(ExecRegDelta,
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"Register npc should be %#x but is %#x.\n",
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regVal, realRegVal);
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}
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res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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realRegVal = thread->readIntReg(SparcISA::NumIntArchRegs + 2);
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if((regVal & 0xF) != (realRegVal & 0xF))
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{
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DPRINTF(ExecRegDelta,
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"Register ccr should be %#x but is %#x.\n",
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regVal, realRegVal);
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}
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#endif
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}
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/* namespace Trace */ }
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////////////////////////////////////////////////////////////////////////
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//
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// ExeTracer Simulation Object
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//
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Trace::NativeTrace *
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NativeTraceParams::create()
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{
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return new Trace::NativeTrace(this);
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};
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