gem5/src/cpu/trace/TraceCPU.py
Radhika Jagtap d7724d5f54 cpu: Add frequency scaling to the Trace CPU
This change adds a simple feature to scale the frequency of
the Trace CPU.

The compute delays in the input traces provide timing. This
change adds a freqency multiplier parameter to the Trace CPU
set to 1.0 by default. The compute delay is manipulated to
effectively achieve the  frequency at which the nodes become
ready and thus scale the frequency of the Trace CPU.

Change-Id: Iaabbd57806941ad56094fcddbeb38fcee1172431
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-09-15 18:01:09 +01:00

78 lines
3.4 KiB
Python

# Copyright (c) 2013 - 2016 ARM Limited
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#
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# Authors: Radhika Jagtap
# Andreas Hansson
# Thomas Grass
from m5.params import *
from BaseCPU import BaseCPU
class TraceCPU(BaseCPU):
"""Trace CPU model which replays traces generated in a prior simulation
using DerivO3CPU or its derived classes. It interfaces with L1 caches.
"""
type = 'TraceCPU'
cxx_header = "cpu/trace/trace_cpu.hh"
@classmethod
def memory_mode(cls):
return 'timing'
@classmethod
def require_caches(cls):
return True
def addPMU(self, pmu = None):
pass
@classmethod
def support_take_over(cls):
return True
instTraceFile = Param.String("", "Instruction trace file")
dataTraceFile = Param.String("", "Data dependency trace file")
sizeStoreBuffer = Param.Unsigned(16, "Number of entries in the store "\
"buffer")
sizeLoadBuffer = Param.Unsigned(16, "Number of entries in the load buffer")
sizeROB = Param.Unsigned(40, "Number of entries in the re-order buffer")
# Frequency multiplier used to effectively scale the Trace CPU frequency
# either up or down. Note that the Trace CPU's clock domain must also be
# changed when frequency is scaled. A default value of 1.0 means the same
# frequency as was used for generating the traces.
freqMultiplier = Param.Float(1.0, "Multiplier scale the Trace CPU "\
"frequency up or down")