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Steve Reinhardt cf826ae296 Minor fixes for full-system timing memory. 
Need to rewrite bus bridge to get any further.

src/dev/io_device.cc:
    Set packet dest on timing responses.
src/mem/bus.cc:
    Fix dest addr bounds check assertion.
    Add assertion to catch infinite loopbacks.
src/mem/physical.cc:
    Add comment.

--HG--
extra : convert_revision : 419b65a3a61e2d099884dbda117b338dffd80896
2006-05-23 17:16:45 -04:00
..
arch Get rid of FastCPU model. 2006-05-22 22:18:08 -04:00
base Clean up libelf handling. 2006-05-22 21:51:59 -04:00
cpu Get rid of FastCPU model. 2006-05-22 22:18:08 -04:00
dev Minor fixes for full-system timing memory. 2006-05-23 17:16:45 -04:00
kern New directory structure: 2006-05-22 14:29:33 -04:00
mem Minor fixes for full-system timing memory. 2006-05-23 17:16:45 -04:00
python New directory structure: 2006-05-22 14:29:33 -04:00
sim New directory structure: 2006-05-22 14:29:33 -04:00
unittest New directory structure: 2006-05-22 14:29:33 -04:00
Doxyfile New directory structure: 2006-05-22 14:29:33 -04:00
SConscript Clean up libelf handling. 2006-05-22 21:51:59 -04:00