gem5/tests/configs
Steve Reinhardt 0305159abf PhysicalMemory has vector of uniform ports instead of one special one.
configs/example/memtest.py:
    PhysicalMemory has vector of uniform ports instead of one special one.
    Other updates to fix obsolete brokenness.
src/mem/physical.cc:
src/mem/physical.hh:
src/python/m5/objects/PhysicalMemory.py:
    Have vector of uniform ports instead of one special one.
src/python/swig/pyobject.cc:
    Add comment.

--HG--
extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1
2007-05-19 00:24:34 -04:00
..
memtest.py PhysicalMemory has vector of uniform ports instead of one special one. 2007-05-19 00:24:34 -04:00
o3-timing-mp.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
o3-timing.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
simple-atomic-mp.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
simple-atomic.py Update configs to set the CPU clock properly. 2007-04-22 14:39:39 -04:00
simple-timing-mp.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
simple-timing.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
t1000-simple-atomic.py Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
tsunami-simple-atomic-dual.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
tsunami-simple-atomic.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
tsunami-simple-timing-dual.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
tsunami-simple-timing.py remove hit_latency and make latency do the right thing 2007-05-10 18:24:48 -04:00
twosys-tsunami-simple-atomic.py change this to be a quick one so that it's in the regressions every night - it's only maybe 15 min. long. 2006-12-01 13:51:49 -05:00