85 lines
3 KiB
C++
85 lines
3 KiB
C++
/*
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* Copyright (c) 2009 ARM Limited
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#include "arch/arm/faults.hh"
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#include "arch/arm/utility.hh"
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#include "cpu/thread_context.hh"
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namespace ArmISA {
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void
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initCPU(ThreadContext *tc, int cpuId)
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{
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// Reset CP15?? What does that mean -- ali
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// FPEXC.EN = 0
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static Fault reset = new Reset;
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if (cpuId == 0)
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reset->invoke(tc);
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}
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uint64_t getArgument(ThreadContext *tc, int number, bool fp) {
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#if FULL_SYSTEM
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panic("getArgument() not implemented for ARM!\n");
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#else
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panic("getArgument() only implemented for FULL_SYSTEM\n");
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M5_DUMMY_RETURN
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#endif
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}
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Fault
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setCp15Register(uint32_t &Rd, int CRn, int opc1, int CRm, int opc2)
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{
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return new UnimpFault(csprintf("MCR CP15: CRn: %d opc1: %d CRm: %d opc1: %d\n",
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CRn, opc1, CRm, opc2));
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}
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Fault
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readCp15Register(uint32_t &Rd, int CRn, int opc1, int CRm, int opc2)
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{
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return new UnimpFault(csprintf("MRC CP15: CRn: %d opc1: %d CRm: %d opc1: %d\n",
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CRn, opc1, CRm, opc2));
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}
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}
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