f85286b3de
Port proxies are used to replace non-structural ports, and thus enable all ports in the system to correspond to a structural entity. This has the advantage of accessing memory through the normal memory subsystem and thus allowing any constellation of distributed memories, address maps, etc. Most accesses are done through the "system port" that is used for loading binaries, debugging etc. For the entities that belong to the CPU, e.g. threads and thread contexts, they wrap the CPU data port in a port proxy. The following replacements are made: FunctionalPort > PortProxy TranslatingPort > SETranslatingPortProxy VirtualPort > FSTranslatingPortProxy --HG-- rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
105 lines
3.6 KiB
C++
105 lines
3.6 KiB
C++
/*
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* Copyright (c) 2010 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#ifndef __ARCH_ARM_SYSTEM_HH__
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#define __ARCH_ARM_SYSTEM_HH__
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#include <string>
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#include <vector>
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#include "kern/linux/events.hh"
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#include "params/ArmSystem.hh"
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#include "sim/sim_object.hh"
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#include "sim/system.hh"
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class ArmSystem : public System
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{
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protected:
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/**
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* PC based event to skip the dprink() call and emulate its
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* functionality
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*/
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Linux::DebugPrintkEvent *debugPrintkEvent;
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/**
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* Pointer to the bootloader object
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*/
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ObjectFile *bootldr;
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public:
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typedef ArmSystemParams Params;
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const Params *
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params() const
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{
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return dynamic_cast<const Params *>(_params);
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}
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ArmSystem(Params *p);
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~ArmSystem();
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/**
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* Initialise the system
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*/
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virtual void initState();
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/** Check if an address should be uncacheable until all caches are enabled.
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* This exits because coherence on some addresses at boot is maintained via
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* sw coherence until the caches are enbaled. Since we don't support sw
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* coherence operations in gem5, this is a method that allows a system
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* type to designate certain addresses that should remain uncachebale
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* for a while.
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*/
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virtual bool adderBootUncacheable(Addr a) { return false; }
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virtual Addr fixFuncEventAddr(Addr addr)
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{
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// Remove the low bit that thumb symbols have set
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// but that aren't actually odd aligned
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if (addr & 0x1)
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return addr & ~1;
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return addr;
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}
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};
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#endif
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