gem5/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt
Nilay Vaish 9bc132e473 regressions: update stats due to branch predictor changes
The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.
2013-01-24 12:29:00 -06:00

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---------- Begin Simulation Statistics ----------
sim_seconds 0.913189 # Number of seconds simulated
sim_ticks 913189263000 # Number of ticks simulated
final_tick 913189263000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 2288605 # Simulator instruction rate (inst/s)
host_op_rate 2288605 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1148451794 # Simulator tick rate (ticks/s)
host_mem_usage 263992 # Number of bytes of host memory used
host_seconds 795.15 # Real time elapsed on the host
sim_insts 1819780127 # Number of instructions simulated
sim_ops 1819780127 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 7305514036 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 1974795935 # Number of bytes read from this memory
system.physmem.bytes_read::total 9280309971 # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst 7305514036 # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total 7305514036 # Number of instructions bytes read from this memory
system.physmem.bytes_written::cpu.data 827777307 # Number of bytes written to this memory
system.physmem.bytes_written::total 827777307 # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst 1826378509 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 444595663 # Number of read requests responded to by this memory
system.physmem.num_reads::total 2270974172 # Number of read requests responded to by this memory
system.physmem.num_writes::cpu.data 160728502 # Number of write requests responded to by this memory
system.physmem.num_writes::total 160728502 # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst 7999999926 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data 2162526450 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total 10162526375 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst 7999999926 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total 7999999926 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::cpu.data 906468506 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total 906468506 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::cpu.inst 7999999926 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 3068994956 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 11068994882 # Total bandwidth to/from this memory (bytes/s)
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
system.cpu.dtb.fetch_accesses 0 # ITB accesses
system.cpu.dtb.read_hits 444595663 # DTB read hits
system.cpu.dtb.read_misses 4897078 # DTB read misses
system.cpu.dtb.read_acv 0 # DTB read access violations
system.cpu.dtb.read_accesses 449492741 # DTB read accesses
system.cpu.dtb.write_hits 160728502 # DTB write hits
system.cpu.dtb.write_misses 1701304 # DTB write misses
system.cpu.dtb.write_acv 0 # DTB write access violations
system.cpu.dtb.write_accesses 162429806 # DTB write accesses
system.cpu.dtb.data_hits 605324165 # DTB hits
system.cpu.dtb.data_misses 6598382 # DTB misses
system.cpu.dtb.data_acv 0 # DTB access violations
system.cpu.dtb.data_accesses 611922547 # DTB accesses
system.cpu.itb.fetch_hits 1826378509 # ITB hits
system.cpu.itb.fetch_misses 18 # ITB misses
system.cpu.itb.fetch_acv 0 # ITB acv
system.cpu.itb.fetch_accesses 1826378527 # ITB accesses
system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
system.cpu.itb.read_acv 0 # DTB read access violations
system.cpu.itb.read_accesses 0 # DTB read accesses
system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.itb.write_acv 0 # DTB write access violations
system.cpu.itb.write_accesses 0 # DTB write accesses
system.cpu.itb.data_hits 0 # DTB hits
system.cpu.itb.data_misses 0 # DTB misses
system.cpu.itb.data_acv 0 # DTB access violations
system.cpu.itb.data_accesses 0 # DTB accesses
system.cpu.workload.num_syscalls 29 # Number of system calls
system.cpu.numCycles 1826378527 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 1819780127 # Number of instructions committed
system.cpu.committedOps 1819780127 # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses 1725565901 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 805526 # Number of float alu accesses
system.cpu.num_func_calls 33534877 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 164021647 # number of instructions that are conditional controls
system.cpu.num_int_insts 1725565901 # number of integer instructions
system.cpu.num_fp_insts 805526 # number of float instructions
system.cpu.num_int_register_reads 2347934659 # number of times the integer registers were read
system.cpu.num_int_register_writes 1376202618 # number of times the integer registers were written
system.cpu.num_fp_register_reads 357 # number of times the floating registers were read
system.cpu.num_fp_register_writes 345 # number of times the floating registers were written
system.cpu.num_mem_refs 611922547 # number of memory refs
system.cpu.num_load_insts 449492741 # Number of load instructions
system.cpu.num_store_insts 162429806 # Number of store instructions
system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_busy_cycles 1826378527 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
---------- End Simulation Statistics ----------