225 lines
7.7 KiB
C++
225 lines
7.7 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#include "arch/sparc/regfile.hh"
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Fault
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SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
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ExecContext *xc)
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{
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int64_t time;
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SparcSystem *sys;
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switch (miscReg) {
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/** Full system only ASRs */
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case MISCREG_SOFTINT:
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if (isNonPriv())
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return new PrivilegedOpcode;
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// Check if we are going to interrupt because of something
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int oldLevel = InterruptLevel(softint);
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int newLevel = InterruptLevel(val);
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setReg(miscReg, val);
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if (newLevel > oldLevel)
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; // MUST DO SOMETHING HERE TO TELL CPU TO LOOK FOR INTERRUPTS XXX
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//xc->getCpuPtr()->checkInterrupts = true;
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return NoFault;
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case MISCREG_SOFTINT_CLR:
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return setRegWithEffect(miscReg, ~val & softint, xc);
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case MISCREG_SOFTINT_SET:
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return setRegWithEffect(miscReg, val | softint, xc);
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case MISCREG_TICK_CMPR:
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if (isNonPriv())
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return new PrivilegedOpcode;
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if (tickCompare == NULL)
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tickCompare = new TickCompareEvent(this, xc);
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setReg(miscReg, val);
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if (tick_cmprFields.int_dis && tickCompare.scheduled())
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tickCompare.deschedule();
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time = tick_cmprFields.tick_cmpr - tickFields.counter;
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if (!tick_cmprFields.int_dis && time > 0)
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tickCompare.schedule(time * xc->getCpuPtr()->cycles(1));
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return NoFault;
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case MISCREG_STICK:
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if (isNonPriv())
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return new PrivilegedOpcode;
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if (isPriv())
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return new PrivilegedAction;
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sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
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assert(sys != NULL);
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sys->sysTick = curTick/Clock::Int::ns - val & ~Bit64;
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stickFields.npt = val & Bit64 ? 1 : 0;
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return NoFault;
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case MISCREG_STICK_CMPR:
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if (isNonPriv())
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return new PrivilegedOpcode;
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if (sTickCompare == NULL)
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sTickCompare = new STickCompareEvent(this, xc);
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sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
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assert(sys != NULL);
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setReg(miscReg, val);
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if (stick_cmprFields.int_dis && sTickCompare.scheduled())
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sTickCompare.deschedule();
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time = stick_cmprFields.tick_cmpr - sys->sysTick;
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if (!stick_cmprFields.int_dis && time > 0)
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sTickCompare.schedule(time * Clock::Int::ns);
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return NoFault;
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/** Fullsystem only Priv registers. */
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case MISCREG_PIL:
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if (FULL_SYSTEM) {
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setReg(miscReg, val);
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//xc->getCpuPtr()->checkInterrupts;
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// MUST DO SOMETHING HERE TO TELL CPU TO LOOK FOR INTERRUPTS XXX
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return NoFault;
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} else
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panic("PIL not implemented for syscall emulation\n");
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/** Hyper privileged registers */
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case MISCREG_HPSTATE:
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case MISCREG_HINTP:
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setReg(miscReg, val);
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return NoFault;
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case MISCREG_HTSTATE:
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if (tl == 0)
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return new IllegalInstruction;
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setReg(miscReg, val);
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return NoFault;
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case MISCREG_HTBA:
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// clear lower 7 bits on writes.
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setReg(miscReg, val & ULL(~0x7FFF));
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return NoFault;
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case MISCREG_STRAND_STS_REG:
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setReg(miscReg, strandStatusReg);
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return NoFault;
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case MISCREG_HSTICK_CMPR:
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if (isNonPriv())
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return new PrivilegedOpcode;
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if (hSTickCompare == NULL)
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hSTickCompare = new HSTickCompareEvent(this, xc);
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sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
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assert(sys != NULL);
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setReg(miscReg, val);
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if (hstick_cmprFields.int_dis && hSTickCompare.scheduled())
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hSTickCompare.deschedule();
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int64_t time = hstick_cmprFields.tick_cmpr - sys->sysTick;
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if (!hstick_cmprFields.int_dis && time > 0)
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hSTickCompare.schedule(time * Clock::Int::ns);
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return NoFault;
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default:
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return new IllegalInstruction;
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}
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}
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MiscReg
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MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ExecContext * xc)
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{
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switch (miscReg) {
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/** Privileged registers. */
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case MISCREG_SOFTINT:
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if (isNonPriv()) {
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fault = new PrivilegedOpcode;
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return 0;
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}
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return readReg(miscReg);
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case MISCREG_TICK_CMPR:
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if (isNonPriv()) {
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fault = new PrivilegedOpcode;
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return 0;
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}
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return readReg(miscReg);
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case MISCREG_STICK:
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SparcSystem *sys;
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if (stickFields.npt && !isNonPriv()) {
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fault = new PrivilegedAction;
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return 0;
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}
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sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
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assert(sys != NULL);
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return curTick/Clock::Int::ns - sys->sysTick | stickFields.npt << 63;
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case MISCREG_STICK_CMPR:
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if (isNonPriv()) {
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fault = new PrivilegedOpcode;
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return 0;
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}
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return readReg(miscReg);
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/** Hyper privileged registers */
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case MISCREG_HPSTATE:
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case MISCREG_HINTP:
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return readReg(miscReg);
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case MISCREG_HTSTATE:
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if (tl == 0) {
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fault = new IllegalInstruction;
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return 0;
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}
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return readReg(miscReg);
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case MISCREG_HTBA:
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return readReg(miscReg) & ULL(~0x7FFF);
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case MISCREG_HVER:
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return NWindows | MaxTL << 8 | MaxGL << 16;
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case MISCREG_STRAND_STS_REG:
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return strandStatusReg;
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case MISCREG_HSTICK_CMPR:
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return hstick_cmpr;
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default:
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fault = new IllegalInstruction;
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return 0;
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}
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}
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void
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MiscRegFile::processTickCompare(ExecContext *xc)
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{
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panic("tick compare not implemented\n");
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}
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void
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MiscRegFile::processSTickCompare(ExecContext *xc)
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{
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panic("tick compare not implemented\n");
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}
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void
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MiscRegFile::processHSTickCompare(ExecContext *xc)
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{
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panic("tick compare not implemented\n");
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}
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}; // namespace SparcISA
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