3d99b4a544
arch/sparc/isa/base.isa: Added a set of abbreviations for the different condition tests. arch/sparc/isa/decoder.isa: Fixes and additions to get syscall emulation closer to working. arch/sparc/isa/formats/branch.isa: Fixed branches so that the immediate version actually uses the immediate value arch/sparc/isa/formats/integerop.isa: Compute the condition codes -before- writing to the state of the machine. arch/sparc/isa/formats/mem.isa: An attempt to fix up the output of the disassembly of loads and stores. arch/sparc/isa/formats/trap.isa: Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions. arch/sparc/isa/operands.isa: Added an R1 operand, and fixed up the numbering arch/sparc/isa_traits.hh: SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc. arch/sparc/linux/process.cc: arch/sparc/linux/process.hh: Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in. arch/sparc/process.cc: arch/sparc/process.hh: Fixed up how the initial stack frame is set up. arch/sparc/regfile.hh: Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up. cpu/cpu_exec_context.hh: cpu/exec_context.hh: cpu/simple/cpu.hh: sim/process.cc: sim/process.hh: Changed the syscall mechanism to pass down the syscall number directly. --HG-- extra : convert_revision : 15723b949a0ddb3d24e68c079343b4dba2439f43
220 lines
6.3 KiB
Text
220 lines
6.3 KiB
Text
////////////////////////////////////////////////////////////////////
|
|
//
|
|
// Base class for sparc instructions, and some support functions
|
|
//
|
|
|
|
output header {{
|
|
|
|
union CondCodes
|
|
{
|
|
struct
|
|
{
|
|
uint8_t c:1;
|
|
uint8_t v:1;
|
|
uint8_t z:1;
|
|
uint8_t n:1;
|
|
};
|
|
uint32_t bits;
|
|
};
|
|
|
|
enum CondTest
|
|
{
|
|
Always=0x8,
|
|
Never=0x0,
|
|
NotEqual=0x9,
|
|
Equal=0x1,
|
|
Greater=0xA,
|
|
LessOrEqual=0x2,
|
|
GreaterOrEqual=0xB,
|
|
Less=0x3,
|
|
GreaterUnsigned=0xC,
|
|
LessOrEqualUnsigned=0x4,
|
|
CarryClear=0xD,
|
|
CarrySet=0x5,
|
|
Positive=0xE,
|
|
Negative=0x6,
|
|
OverflowClear=0xF,
|
|
OverflowSet=0x7
|
|
};
|
|
|
|
extern char * CondTestAbbrev[];
|
|
|
|
/**
|
|
* Base class for all SPARC static instructions.
|
|
*/
|
|
class SparcStaticInst : public StaticInst
|
|
{
|
|
protected:
|
|
// Constructor.
|
|
SparcStaticInst(const char *mnem,
|
|
MachInst _machInst, OpClass __opClass)
|
|
: StaticInst(mnem, _machInst, __opClass)
|
|
{
|
|
}
|
|
|
|
std::string generateDisassembly(Addr pc,
|
|
const SymbolTable *symtab) const;
|
|
|
|
void printReg(std::ostream &os, int reg) const;
|
|
};
|
|
|
|
bool passesCondition(uint32_t codes, uint32_t condition);
|
|
|
|
inline int64_t sign_ext(uint64_t data, int origWidth)
|
|
{
|
|
int shiftAmount = 64 - origWidth;
|
|
return (((int64_t)data) << shiftAmount) >> shiftAmount;
|
|
}
|
|
}};
|
|
|
|
output decoder {{
|
|
|
|
char * CondTestAbbrev[] =
|
|
{
|
|
"nev", //Never
|
|
"e", //Equal
|
|
"le", //Less or Equal
|
|
"l", //Less
|
|
"leu", //Less or Equal Unsigned
|
|
"c", //Carry set
|
|
"n", //Negative
|
|
"o", //Overflow set
|
|
"a", //Always
|
|
"ne", //Not Equal
|
|
"g", //Greater
|
|
"ge", //Greater or Equal
|
|
"gu", //Greater Unsigned
|
|
"cc", //Carry clear
|
|
"p", //Positive
|
|
"oc" //Overflow Clear
|
|
};
|
|
}};
|
|
|
|
def template ROrImmDecode {{
|
|
{
|
|
return (I ? (SparcStaticInst *)(new %(class_name)sImm(machInst))
|
|
: (SparcStaticInst *)(new %(class_name)s(machInst)));
|
|
}
|
|
}};
|
|
|
|
let {{
|
|
def splitOutImm(code):
|
|
matcher = re.compile(r'Rs(?P<rNum>\d)_or_imm(?P<iNum>\d+)')
|
|
rOrImmMatch = matcher.search(code)
|
|
if (rOrImmMatch == None):
|
|
return (False, code, '', '', '')
|
|
rString = rOrImmMatch.group("rNum")
|
|
iString = rOrImmMatch.group("iNum")
|
|
orig_code = code
|
|
code = matcher.sub('Rs' + rOrImmMatch.group("rNum"), orig_code)
|
|
imm_code = matcher.sub('imm', orig_code)
|
|
return (True, code, imm_code, rString, iString)
|
|
}};
|
|
|
|
output decoder {{
|
|
|
|
inline void printMnemonic(std::ostream &os, const char * mnemonic)
|
|
{
|
|
ccprintf(os, "\t%s ", mnemonic);
|
|
}
|
|
|
|
void
|
|
SparcStaticInst::printReg(std::ostream &os, int reg) const
|
|
{
|
|
const int MaxGlobal = 8;
|
|
const int MaxOutput = 16;
|
|
const int MaxLocal = 24;
|
|
const int MaxInput = 32;
|
|
if (reg == FramePointerReg)
|
|
ccprintf(os, "%%fp");
|
|
else if (reg == StackPointerReg)
|
|
ccprintf(os, "%%sp");
|
|
else if(reg < MaxGlobal)
|
|
ccprintf(os, "%%g%d", reg);
|
|
else if(reg < MaxOutput)
|
|
ccprintf(os, "%%o%d", reg - MaxGlobal);
|
|
else if(reg < MaxLocal)
|
|
ccprintf(os, "%%l%d", reg - MaxOutput);
|
|
else if(reg < MaxInput)
|
|
ccprintf(os, "%%i%d", reg - MaxLocal);
|
|
else {
|
|
ccprintf(os, "%%f%d", reg - FP_Base_DepTag);
|
|
}
|
|
}
|
|
|
|
std::string SparcStaticInst::generateDisassembly(Addr pc,
|
|
const SymbolTable *symtab) const
|
|
{
|
|
std::stringstream ss;
|
|
|
|
printMnemonic(ss, mnemonic);
|
|
|
|
// just print the first two source regs... if there's
|
|
// a third one, it's a read-modify-write dest (Rc),
|
|
// e.g. for CMOVxx
|
|
if(_numSrcRegs > 0)
|
|
{
|
|
printReg(ss, _srcRegIdx[0]);
|
|
}
|
|
if(_numSrcRegs > 1)
|
|
{
|
|
ss << ",";
|
|
printReg(ss, _srcRegIdx[1]);
|
|
}
|
|
|
|
// just print the first dest... if there's a second one,
|
|
// it's generally implicit
|
|
if(_numDestRegs > 0)
|
|
{
|
|
if(_numSrcRegs > 0)
|
|
ss << ",";
|
|
printReg(ss, _destRegIdx[0]);
|
|
}
|
|
|
|
return ss.str();
|
|
}
|
|
|
|
bool passesCondition(uint32_t codes, uint32_t condition)
|
|
{
|
|
CondCodes condCodes;
|
|
condCodes.bits = codes;
|
|
switch(condition)
|
|
{
|
|
case Always:
|
|
return true;
|
|
case Never:
|
|
return false;
|
|
case NotEqual:
|
|
return !condCodes.z;
|
|
case Equal:
|
|
return condCodes.z;
|
|
case Greater:
|
|
return !(condCodes.z | (condCodes.n ^ condCodes.v));
|
|
case LessOrEqual:
|
|
return condCodes.z | (condCodes.n ^ condCodes.v);
|
|
case GreaterOrEqual:
|
|
return !(condCodes.n ^ condCodes.v);
|
|
case Less:
|
|
return (condCodes.n ^ condCodes.v);
|
|
case GreaterUnsigned:
|
|
return !(condCodes.c | condCodes.z);
|
|
case LessOrEqualUnsigned:
|
|
return (condCodes.c | condCodes.z);
|
|
case CarryClear:
|
|
return !condCodes.c;
|
|
case CarrySet:
|
|
return condCodes.c;
|
|
case Positive:
|
|
return !condCodes.n;
|
|
case Negative:
|
|
return condCodes.n;
|
|
case OverflowClear:
|
|
return !condCodes.v;
|
|
case OverflowSet:
|
|
return condCodes.v;
|
|
}
|
|
panic("Tried testing condition nonexistant "
|
|
"condition code %d", condition);
|
|
}
|
|
}};
|
|
|