c86f849d5a
This patch rpovides functional access support in Ruby. Currently only the M5Port of RubyPort supports functional accesses. The support for functional through the PioPort will be added as a separate patch.
127 lines
4.4 KiB
Python
127 lines
4.4 KiB
Python
# Copyright (c) 2006-2007 The Regents of The University of Michigan
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# Copyright (c) 2009 Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Ron Dreslinski
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# Brad Beckmann
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import m5
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from m5.objects import *
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from m5.defines import buildEnv
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from m5.util import addToPath
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import os, optparse, sys
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addToPath('../common')
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addToPath('../ruby')
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import Ruby
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if buildEnv['FULL_SYSTEM']:
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panic("This script requires system-emulation mode (*_SE).")
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# Get paths we might need. It's expected this file is in m5/configs/example.
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config_path = os.path.dirname(os.path.abspath(__file__))
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config_root = os.path.dirname(config_path)
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m5_root = os.path.dirname(config_root)
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parser = optparse.OptionParser()
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parser.add_option("-l", "--requests", metavar="N", default=100,
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help="Stop after N requests")
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parser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
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help="Wakeup every N cycles")
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parser.add_option("--test-type", type="string", default="SeriesGetx",
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help="SeriesGetx|SeriesGets|Invalidate")
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#
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# Add the ruby specific and protocol specific options
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#
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Ruby.define_options(parser)
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execfile(os.path.join(config_root, "common", "Options.py"))
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(options, args) = parser.parse_args()
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if args:
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print "Error: script doesn't take any positional arguments"
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sys.exit(1)
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#
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# Select the direct test generator
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#
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if options.test_type == "SeriesGetx":
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generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
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issue_writes = True)
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elif options.test_type == "SeriesGets":
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generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
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issue_writes = False)
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elif options.test_type == "Invalidate":
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generator = InvalidateGenerator(num_cpus = options.num_cpus)
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else:
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print "Error: unknown direct test generator"
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sys.exit(1)
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#
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# Create the M5 system. Note that the PhysicalMemory Object isn't
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# actually used by the rubytester, but is included to support the
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# M5 memory size == Ruby memory size checks
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#
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system = System(physmem = PhysicalMemory())
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#
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# Create the ruby random tester
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#
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system.tester = RubyDirectedTester(requests_to_complete = \
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options.requests,
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generator = generator)
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Ruby.create_system(options, system)
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assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
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for ruby_port in system.ruby._cpu_ruby_ports:
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#
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# Tie the ruby tester ports to the ruby cpu ports
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#
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system.tester.cpuPort = ruby_port.port
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# -----------------------
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# run simulation
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# -----------------------
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root = Root( system = system )
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root.system.mem_mode = 'timing'
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# Not much point in this being higher than the L1 latency
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m5.ticks.setGlobalFrequency('1ns')
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# instantiate configuration
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m5.instantiate()
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# simulate until program terminates
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exit_event = m5.simulate(options.maxtick)
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print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
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