gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
Jason Lowe-Power 153e5879c6 x86: Fix implicit stack addressing in 64-bit mode
When in 64-bit mode, if the stack is accessed implicitly by an instruction
the alternate address prefix should be ignored if present.

This patch adds an extra flag to the ldstop which signifies when the
address override should be ignored. Then, for all of the affected
instructions, this patch adds two options to the ld and st opcode to use
the current stack addressing mode for all addresses and to ignore the
AddressSizeFlagBit.  Finally, this patch updates the x86 TLB to not
truncate the address if it is in 64-bit mode and the IgnoreAddrSizeFlagBit
is set.

This fixes a problem when calling __libc_start_main with a binary that is
linked with a recent version of ld. This version of ld uses the address
override prefix (0x67) on the call instruction instead of a nop.

Note: This has not been tested in compatibility mode and only the call
instruction with the address override prefix has been tested.

See [1] page 9 (pdf page 45)

For instructions that are affected see [1] page 519 (pdf page 555).

[1] http://support.amd.com/TechDocs/24594.pdf

Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-10 11:19:34 -05:00

194 lines
6.9 KiB
Python

# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
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# Authors: Gabe Black
microcode = '''
def macroop POP_R {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
ldis t1, ss, [1, t0, rsp], dataSize=ssz
addi rsp, rsp, ssz, dataSize=asz
mov reg, reg, t1
};
def macroop POP_M {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
ldis t1, ss, [1, t0, rsp], dataSize=ssz
cda seg, sib, disp, dataSize=ssz
addi rsp, rsp, ssz, dataSize=asz
st t1, seg, sib, disp, dataSize=ssz
};
def macroop POP_P {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
rdip t7
ld t1, ss, [1, t0, rsp], dataSize=ssz
cda seg, sib, disp, dataSize=ssz
addi rsp, rsp, ssz, dataSize=asz
st t1, seg, riprel, disp, dataSize=ssz
};
def macroop PUSH_R {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
stis reg, ss, [1, t0, rsp], "-env.stackSize", dataSize=ssz
subi rsp, rsp, ssz
};
def macroop PUSH_I {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
limm t1, imm
stis t1, ss, [1, t0, rsp], "-env.stackSize", dataSize=ssz
subi rsp, rsp, ssz
};
def macroop PUSH_M {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
ld t1, seg, sib, disp, dataSize=ssz
st t1, ss, [1, t0, rsp], "-env.stackSize", dataSize=ssz
subi rsp, rsp, ssz
};
def macroop PUSH_P {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
rdip t7
ld t1, seg, riprel, disp, dataSize=ssz
st t1, ss, [1, t0, rsp], "-env.stackSize", dataSize=ssz
subi rsp, rsp, ssz
};
def macroop PUSHA {
# Check all the stack addresses. We'll assume that if the beginning and
# end are ok, then the stuff in the middle should be as well.
cda ss, [1, t0, rsp], "-env.stackSize", dataSize=ssz
cda ss, [1, t0, rsp], "-8 * env.stackSize", dataSize=ssz
st rax, ss, [1, t0, rsp], "1 * -env.stackSize", dataSize=ssz
st rcx, ss, [1, t0, rsp], "2 * -env.stackSize", dataSize=ssz
st rdx, ss, [1, t0, rsp], "3 * -env.stackSize", dataSize=ssz
st rbx, ss, [1, t0, rsp], "4 * -env.stackSize", dataSize=ssz
st rsp, ss, [1, t0, rsp], "5 * -env.stackSize", dataSize=ssz
st rbp, ss, [1, t0, rsp], "6 * -env.stackSize", dataSize=ssz
st rsi, ss, [1, t0, rsp], "7 * -env.stackSize", dataSize=ssz
st rdi, ss, [1, t0, rsp], "8 * -env.stackSize", dataSize=ssz
subi rsp, rsp, "8 * env.stackSize"
};
def macroop POPA {
# Check all the stack addresses. We'll assume that if the beginning and
# end are ok, then the stuff in the middle should be as well.
ld t1, ss, [1, t0, rsp], "0 * env.stackSize", dataSize=ssz
ld t2, ss, [1, t0, rsp], "7 * env.stackSize", dataSize=ssz
mov rdi, rdi, t1, dataSize=ssz
ld rsi, ss, [1, t0, rsp], "1 * env.stackSize", dataSize=ssz
ld rbp, ss, [1, t0, rsp], "2 * env.stackSize", dataSize=ssz
ld rbx, ss, [1, t0, rsp], "4 * env.stackSize", dataSize=ssz
ld rdx, ss, [1, t0, rsp], "5 * env.stackSize", dataSize=ssz
ld rcx, ss, [1, t0, rsp], "6 * env.stackSize", dataSize=ssz
mov rax, rax, t2, dataSize=ssz
addi rsp, rsp, "8 * env.stackSize", dataSize=asz
};
def macroop LEAVE {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
mov t1, t1, rbp, dataSize=ssz
ldis rbp, ss, [1, t0, t1], dataSize=ssz
mov rsp, rsp, t1, dataSize=ssz
addi rsp, rsp, ssz, dataSize=ssz
};
def macroop ENTER_I_I {
.adjust_env oszIn64Override
# This needs to check all the addresses it writes to before it actually
# writes any values.
# Pull the different components out of the immediate
limm t1, imm, dataSize=8
zexti t2, t1, 15, dataSize=8
srli t1, t1, 16, dataSize=8
zexti t1, t1, 5, dataSize=8
# t1 is now the masked nesting level, and t2 is the amount of storage.
# Push rbp.
stis rbp, ss, [1, t0, rsp], "-env.dataSize"
subi rsp, rsp, ssz
# Save the stack pointer for later
mov t6, t6, rsp
# If the nesting level is zero, skip all this stuff.
sub t0, t1, t0, flags=(EZF,), dataSize=2
br label("skipLoop"), flags=(CEZF,)
# If the level was 1, only push the saved rbp
subi t0, t1, 1, flags=(EZF,)
br label("bottomOfLoop"), flags=(CEZF,)
limm t4, "ULL(-1)", dataSize=8
topOfLoop:
ldis t5, ss, [dsz, t4, rbp]
stis t5, ss, [1, t0, rsp], "-env.dataSize"
subi rsp, rsp, ssz
# If we're not done yet, loop
subi t4, t4, 1, dataSize=8
add t0, t4, t1, flags=(EZF,)
br label("topOfLoop"), flags=(nCEZF,)
bottomOfLoop:
# Push the old rbp onto the stack
stis t6, ss, [1, t0, rsp], "-env.dataSize"
subi rsp, rsp, ssz
skipLoop:
sub rsp, rsp, t2, dataSize=ssz
mov rbp, rbp, t6
};
'''