f3358e5f7b
cpu/o3/2bit_local_pred.cc:
cpu/o3/2bit_local_pred.hh:
cpu/o3/bpred_unit.hh:
cpu/o3/bpred_unit_impl.hh:
cpu/o3/btb.cc:
cpu/o3/btb.hh:
cpu/o3/commit.hh:
cpu/o3/commit_impl.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/decode.hh:
cpu/o3/decode_impl.hh:
cpu/o3/fetch.hh:
cpu/o3/fetch_impl.hh:
cpu/o3/fu_pool.cc:
cpu/o3/fu_pool.hh:
cpu/o3/iew.hh:
cpu/o3/iew_impl.hh:
cpu/o3/inst_queue.hh:
cpu/o3/inst_queue_impl.hh:
cpu/o3/lsq.hh:
cpu/o3/lsq_impl.hh:
cpu/o3/lsq_unit.hh:
cpu/o3/lsq_unit_impl.hh:
cpu/o3/mem_dep_unit.hh:
cpu/o3/mem_dep_unit_impl.hh:
cpu/o3/ras.cc:
cpu/o3/ras.hh:
cpu/o3/rename.hh:
cpu/o3/rename_impl.hh:
cpu/o3/rob.hh:
cpu/o3/rob_impl.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/o3/thread_state.hh:
Handle switching out and taking over. Needs to be able to reset all state.
cpu/o3/alpha_cpu_impl.hh:
Handle taking over from another XC.
--HG--
extra : convert_revision : b936e826f0f8a18319bfa940ff35097b4192b449
102 lines
3 KiB
C++
102 lines
3 KiB
C++
/*
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* Copyright (c) 2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CPU_O3_SAT_COUNTER_HH__
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#define __CPU_O3_SAT_COUNTER_HH__
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#include "sim/host.hh"
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/**
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* Private counter class for the internal saturating counters.
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* Implements an n bit saturating counter and provides methods to
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* increment, decrement, and read it.
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* @todo Consider making this something that more closely mimics a
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* built in class so you can use ++ or --.
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*/
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class SatCounter
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{
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public:
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/**
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* Constructor for the counter.
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*/
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SatCounter();
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/**
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* Constructor for the counter.
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* @param bits How many bits the counter will have.
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*/
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SatCounter(unsigned bits);
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/**
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* Constructor for the counter.
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* @param bits How many bits the counter will have.
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* @param initial_val Starting value for each counter.
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*/
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SatCounter(unsigned bits, uint8_t initial_val);
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/**
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* Sets the number of bits.
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*/
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void setBits(unsigned bits);
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void reset() { counter = initialVal; }
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/**
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* Increments the counter's current value.
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*/
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void increment()
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{
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if (counter < maxVal) {
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++counter;
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}
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}
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/**
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* Decrements the counter's current value.
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*/
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void decrement()
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{
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if (counter > 0) {
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--counter;
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}
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}
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/**
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* Read the counter's value.
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*/
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const uint8_t read() const
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{ return counter; }
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private:
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uint8_t initialVal;
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uint8_t maxVal;
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uint8_t counter;
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};
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#endif // __CPU_O3_SAT_COUNTER_HH__
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