c75ff71139
In general, the ThreadID parameter is unnecessary in the memory system as the ContextID is what is used for the purposes of locks/wakeups. Since we allocate sequential ContextIDs for each thread on MT-enabled CPUs, ThreadID is unnecessary as the CPUs can identify the requesting thread through sideband info (SenderState / LSQ entries) or ContextID offset from the base ContextID for a cpu. This is a re-spin of 20264eb after the revert (bd1c6789) and includes some fixes of that commit.
1306 lines
38 KiB
C++
1306 lines
38 KiB
C++
/*
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* Copyright (c) 2012, 2015 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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|
* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andreas Sandberg
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*/
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#include <linux/kvm.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <cerrno>
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#include <csignal>
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#include <ostream>
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#include "arch/mmapped_ipr.hh"
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#include "arch/utility.hh"
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#include "cpu/kvm/base.hh"
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#include "debug/Checkpoint.hh"
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#include "debug/Drain.hh"
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#include "debug/Kvm.hh"
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#include "debug/KvmIO.hh"
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#include "debug/KvmRun.hh"
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#include "params/BaseKvmCPU.hh"
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#include "sim/process.hh"
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#include "sim/system.hh"
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#include <signal.h>
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/* Used by some KVM macros */
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#define PAGE_SIZE pageSize
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BaseKvmCPU::BaseKvmCPU(BaseKvmCPUParams *params)
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: BaseCPU(params),
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vm(*params->kvmVM),
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_status(Idle),
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dataPort(name() + ".dcache_port", this),
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instPort(name() + ".icache_port", this),
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alwaysSyncTC(params->alwaysSyncTC),
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threadContextDirty(true),
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kvmStateDirty(false),
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vcpuID(vm.allocVCPUID()), vcpuFD(-1), vcpuMMapSize(0),
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_kvmRun(NULL), mmioRing(NULL),
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pageSize(sysconf(_SC_PAGE_SIZE)),
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tickEvent(*this),
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activeInstPeriod(0),
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perfControlledByTimer(params->usePerfOverflow),
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hostFactor(params->hostFactor),
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ctrInsts(0)
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{
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if (pageSize == -1)
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panic("KVM: Failed to determine host page size (%i)\n",
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errno);
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if (FullSystem)
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thread = new SimpleThread(this, 0, params->system, params->itb, params->dtb,
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params->isa[0]);
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else
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thread = new SimpleThread(this, /* thread_num */ 0, params->system,
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params->workload[0], params->itb,
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params->dtb, params->isa[0]);
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thread->setStatus(ThreadContext::Halted);
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tc = thread->getTC();
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threadContexts.push_back(tc);
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}
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BaseKvmCPU::~BaseKvmCPU()
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{
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if (_kvmRun)
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munmap(_kvmRun, vcpuMMapSize);
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close(vcpuFD);
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}
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void
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BaseKvmCPU::init()
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{
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BaseCPU::init();
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if (numThreads != 1)
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fatal("KVM: Multithreading not supported");
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tc->initMemProxies(tc);
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// initialize CPU, including PC
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if (FullSystem && !switchedOut())
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TheISA::initCPU(tc, tc->contextId());
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}
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void
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BaseKvmCPU::startup()
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{
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const BaseKvmCPUParams * const p(
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dynamic_cast<const BaseKvmCPUParams *>(params()));
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Kvm &kvm(*vm.kvm);
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BaseCPU::startup();
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assert(vcpuFD == -1);
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// Tell the VM that a CPU is about to start.
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vm.cpuStartup();
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// We can't initialize KVM CPUs in BaseKvmCPU::init() since we are
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// not guaranteed that the parent KVM VM has initialized at that
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// point. Initialize virtual CPUs here instead.
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vcpuFD = vm.createVCPU(vcpuID);
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// Map the KVM run structure */
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vcpuMMapSize = kvm.getVCPUMMapSize();
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_kvmRun = (struct kvm_run *)mmap(0, vcpuMMapSize,
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PROT_READ | PROT_WRITE, MAP_SHARED,
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vcpuFD, 0);
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if (_kvmRun == MAP_FAILED)
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panic("KVM: Failed to map run data structure\n");
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// Setup a pointer to the MMIO ring buffer if coalesced MMIO is
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// available. The offset into the KVM's communication page is
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// provided by the coalesced MMIO capability.
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int mmioOffset(kvm.capCoalescedMMIO());
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if (!p->useCoalescedMMIO) {
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inform("KVM: Coalesced MMIO disabled by config.\n");
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} else if (mmioOffset) {
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inform("KVM: Coalesced IO available\n");
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mmioRing = (struct kvm_coalesced_mmio_ring *)(
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(char *)_kvmRun + (mmioOffset * pageSize));
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} else {
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inform("KVM: Coalesced not supported by host OS\n");
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}
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thread->startup();
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Event *startupEvent(
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new EventWrapper<BaseKvmCPU,
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&BaseKvmCPU::startupThread>(this, true));
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schedule(startupEvent, curTick());
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}
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void
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BaseKvmCPU::startupThread()
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{
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// Do thread-specific initialization. We need to setup signal
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// delivery for counters and timers from within the thread that
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// will execute the event queue to ensure that signals are
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// delivered to the right threads.
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const BaseKvmCPUParams * const p(
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dynamic_cast<const BaseKvmCPUParams *>(params()));
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vcpuThread = pthread_self();
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// Setup signal handlers. This has to be done after the vCPU is
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// created since it manipulates the vCPU signal mask.
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setupSignalHandler();
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setupCounters();
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if (p->usePerfOverflow)
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runTimer.reset(new PerfKvmTimer(hwCycles,
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KVM_KICK_SIGNAL,
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p->hostFactor,
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p->hostFreq));
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else
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runTimer.reset(new PosixKvmTimer(KVM_KICK_SIGNAL, CLOCK_MONOTONIC,
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p->hostFactor,
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p->hostFreq));
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}
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void
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BaseKvmCPU::regStats()
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{
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using namespace Stats;
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BaseCPU::regStats();
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numInsts
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.name(name() + ".committedInsts")
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.desc("Number of instructions committed")
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;
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numVMExits
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.name(name() + ".numVMExits")
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.desc("total number of KVM exits")
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;
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numVMHalfEntries
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.name(name() + ".numVMHalfEntries")
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.desc("number of KVM entries to finalize pending operations")
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;
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numExitSignal
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.name(name() + ".numExitSignal")
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.desc("exits due to signal delivery")
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;
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numMMIO
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.name(name() + ".numMMIO")
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.desc("number of VM exits due to memory mapped IO")
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;
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numCoalescedMMIO
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.name(name() + ".numCoalescedMMIO")
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.desc("number of coalesced memory mapped IO requests")
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;
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numIO
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.name(name() + ".numIO")
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.desc("number of VM exits due to legacy IO")
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;
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numHalt
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.name(name() + ".numHalt")
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.desc("number of VM exits due to wait for interrupt instructions")
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;
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numInterrupts
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.name(name() + ".numInterrupts")
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.desc("number of interrupts delivered")
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;
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numHypercalls
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.name(name() + ".numHypercalls")
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.desc("number of hypercalls")
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;
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}
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void
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BaseKvmCPU::serializeThread(CheckpointOut &cp, ThreadID tid) const
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{
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if (DTRACE(Checkpoint)) {
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DPRINTF(Checkpoint, "KVM: Serializing thread %i:\n", tid);
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dump();
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}
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assert(tid == 0);
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assert(_status == Idle);
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thread->serialize(cp);
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}
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void
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BaseKvmCPU::unserializeThread(CheckpointIn &cp, ThreadID tid)
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{
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DPRINTF(Checkpoint, "KVM: Unserialize thread %i:\n", tid);
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assert(tid == 0);
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assert(_status == Idle);
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thread->unserialize(cp);
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threadContextDirty = true;
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}
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DrainState
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BaseKvmCPU::drain()
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{
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if (switchedOut())
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return DrainState::Drained;
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DPRINTF(Drain, "BaseKvmCPU::drain\n");
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switch (_status) {
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case Running:
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// The base KVM code is normally ready when it is in the
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// Running state, but the architecture specific code might be
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// of a different opinion. This may happen when the CPU been
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// notified of an event that hasn't been accepted by the vCPU
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// yet.
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if (!archIsDrained())
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return DrainState::Draining;
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// The state of the CPU is consistent, so we don't need to do
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// anything special to drain it. We simply de-schedule the
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// tick event and enter the Idle state to prevent nasty things
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// like MMIOs from happening.
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if (tickEvent.scheduled())
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deschedule(tickEvent);
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_status = Idle;
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/** FALLTHROUGH */
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case Idle:
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// Idle, no need to drain
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assert(!tickEvent.scheduled());
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// Sync the thread context here since we'll need it when we
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// switch CPUs or checkpoint the CPU.
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syncThreadContext();
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return DrainState::Drained;
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case RunningServiceCompletion:
|
|
// The CPU has just requested a service that was handled in
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// the RunningService state, but the results have still not
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// been reported to the CPU. Now, we /could/ probably just
|
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// update the register state ourselves instead of letting KVM
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// handle it, but that would be tricky. Instead, we enter KVM
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// and let it do its stuff.
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DPRINTF(Drain, "KVM CPU is waiting for service completion, "
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"requesting drain.\n");
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return DrainState::Draining;
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|
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case RunningService:
|
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// We need to drain since the CPU is waiting for service (e.g., MMIOs)
|
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DPRINTF(Drain, "KVM CPU is waiting for service, requesting drain.\n");
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return DrainState::Draining;
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|
|
default:
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panic("KVM: Unhandled CPU state in drain()\n");
|
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return DrainState::Drained;
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}
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}
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|
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void
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BaseKvmCPU::drainResume()
|
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{
|
|
assert(!tickEvent.scheduled());
|
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|
|
// We might have been switched out. In that case, we don't need to
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// do anything.
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if (switchedOut())
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return;
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|
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DPRINTF(Kvm, "drainResume\n");
|
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verifyMemoryMode();
|
|
|
|
// The tick event is de-scheduled as a part of the draining
|
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// process. Re-schedule it if the thread context is active.
|
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if (tc->status() == ThreadContext::Active) {
|
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schedule(tickEvent, nextCycle());
|
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_status = Running;
|
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} else {
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_status = Idle;
|
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}
|
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}
|
|
|
|
void
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BaseKvmCPU::notifyFork()
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{
|
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// We should have drained prior to forking, which means that the
|
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// tick event shouldn't be scheduled and the CPU is idle.
|
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assert(!tickEvent.scheduled());
|
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assert(_status == Idle);
|
|
|
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if (vcpuFD != -1) {
|
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if (close(vcpuFD) == -1)
|
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warn("kvm CPU: notifyFork failed to close vcpuFD\n");
|
|
|
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if (_kvmRun)
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munmap(_kvmRun, vcpuMMapSize);
|
|
|
|
vcpuFD = -1;
|
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_kvmRun = NULL;
|
|
|
|
hwInstructions.detach();
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hwCycles.detach();
|
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}
|
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}
|
|
|
|
void
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|
BaseKvmCPU::switchOut()
|
|
{
|
|
DPRINTF(Kvm, "switchOut\n");
|
|
|
|
BaseCPU::switchOut();
|
|
|
|
// We should have drained prior to executing a switchOut, which
|
|
// means that the tick event shouldn't be scheduled and the CPU is
|
|
// idle.
|
|
assert(!tickEvent.scheduled());
|
|
assert(_status == Idle);
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::takeOverFrom(BaseCPU *cpu)
|
|
{
|
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DPRINTF(Kvm, "takeOverFrom\n");
|
|
|
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BaseCPU::takeOverFrom(cpu);
|
|
|
|
// We should have drained prior to executing a switchOut, which
|
|
// means that the tick event shouldn't be scheduled and the CPU is
|
|
// idle.
|
|
assert(!tickEvent.scheduled());
|
|
assert(_status == Idle);
|
|
assert(threadContexts.size() == 1);
|
|
|
|
// Force an update of the KVM state here instead of flagging the
|
|
// TC as dirty. This is not ideal from a performance point of
|
|
// view, but it makes debugging easier as it allows meaningful KVM
|
|
// state to be dumped before and after a takeover.
|
|
updateKvmState();
|
|
threadContextDirty = false;
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::verifyMemoryMode() const
|
|
{
|
|
if (!(system->isAtomicMode() && system->bypassCaches())) {
|
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fatal("The KVM-based CPUs requires the memory system to be in the "
|
|
"'atomic_noncaching' mode.\n");
|
|
}
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::wakeup(ThreadID tid)
|
|
{
|
|
DPRINTF(Kvm, "wakeup()\n");
|
|
// This method might have been called from another
|
|
// context. Migrate to this SimObject's event queue when
|
|
// delivering the wakeup signal.
|
|
EventQueue::ScopedMigration migrate(eventQueue());
|
|
|
|
// Kick the vCPU to get it to come out of KVM.
|
|
kick();
|
|
|
|
if (thread->status() != ThreadContext::Suspended)
|
|
return;
|
|
|
|
thread->activate();
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::activateContext(ThreadID thread_num)
|
|
{
|
|
DPRINTF(Kvm, "ActivateContext %d\n", thread_num);
|
|
|
|
assert(thread_num == 0);
|
|
assert(thread);
|
|
|
|
assert(_status == Idle);
|
|
assert(!tickEvent.scheduled());
|
|
|
|
numCycles += ticksToCycles(thread->lastActivate - thread->lastSuspend);
|
|
|
|
schedule(tickEvent, clockEdge(Cycles(0)));
|
|
_status = Running;
|
|
}
|
|
|
|
|
|
void
|
|
BaseKvmCPU::suspendContext(ThreadID thread_num)
|
|
{
|
|
DPRINTF(Kvm, "SuspendContext %d\n", thread_num);
|
|
|
|
assert(thread_num == 0);
|
|
assert(thread);
|
|
|
|
if (_status == Idle)
|
|
return;
|
|
|
|
assert(_status == Running || _status == RunningServiceCompletion);
|
|
|
|
// The tick event may no be scheduled if the quest has requested
|
|
// the monitor to wait for interrupts. The normal CPU models can
|
|
// get their tick events descheduled by quiesce instructions, but
|
|
// that can't happen here.
|
|
if (tickEvent.scheduled())
|
|
deschedule(tickEvent);
|
|
|
|
_status = Idle;
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::deallocateContext(ThreadID thread_num)
|
|
{
|
|
// for now, these are equivalent
|
|
suspendContext(thread_num);
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::haltContext(ThreadID thread_num)
|
|
{
|
|
// for now, these are equivalent
|
|
suspendContext(thread_num);
|
|
}
|
|
|
|
ThreadContext *
|
|
BaseKvmCPU::getContext(int tn)
|
|
{
|
|
assert(tn == 0);
|
|
syncThreadContext();
|
|
return tc;
|
|
}
|
|
|
|
|
|
Counter
|
|
BaseKvmCPU::totalInsts() const
|
|
{
|
|
return ctrInsts;
|
|
}
|
|
|
|
Counter
|
|
BaseKvmCPU::totalOps() const
|
|
{
|
|
hack_once("Pretending totalOps is equivalent to totalInsts()\n");
|
|
return ctrInsts;
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::dump() const
|
|
{
|
|
inform("State dumping not implemented.");
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::tick()
|
|
{
|
|
Tick delay(0);
|
|
assert(_status != Idle);
|
|
|
|
switch (_status) {
|
|
case RunningService:
|
|
// handleKvmExit() will determine the next state of the CPU
|
|
delay = handleKvmExit();
|
|
|
|
if (tryDrain())
|
|
_status = Idle;
|
|
break;
|
|
|
|
case RunningServiceCompletion:
|
|
case Running: {
|
|
const uint64_t nextInstEvent(
|
|
!comInstEventQueue[0]->empty() ?
|
|
comInstEventQueue[0]->nextTick() : UINT64_MAX);
|
|
// Enter into KVM and complete pending IO instructions if we
|
|
// have an instruction event pending.
|
|
const Tick ticksToExecute(
|
|
nextInstEvent > ctrInsts ?
|
|
curEventQueue()->nextTick() - curTick() : 0);
|
|
|
|
if (alwaysSyncTC)
|
|
threadContextDirty = true;
|
|
|
|
// We might need to update the KVM state.
|
|
syncKvmState();
|
|
|
|
// Setup any pending instruction count breakpoints using
|
|
// PerfEvent if we are going to execute more than just an IO
|
|
// completion.
|
|
if (ticksToExecute > 0)
|
|
setupInstStop();
|
|
|
|
DPRINTF(KvmRun, "Entering KVM...\n");
|
|
if (drainState() == DrainState::Draining) {
|
|
// Force an immediate exit from KVM after completing
|
|
// pending operations. The architecture-specific code
|
|
// takes care to run until it is in a state where it can
|
|
// safely be drained.
|
|
delay = kvmRunDrain();
|
|
} else {
|
|
delay = kvmRun(ticksToExecute);
|
|
}
|
|
|
|
// The CPU might have been suspended before entering into
|
|
// KVM. Assume that the CPU was suspended /before/ entering
|
|
// into KVM and skip the exit handling.
|
|
if (_status == Idle)
|
|
break;
|
|
|
|
// Entering into KVM implies that we'll have to reload the thread
|
|
// context from KVM if we want to access it. Flag the KVM state as
|
|
// dirty with respect to the cached thread context.
|
|
kvmStateDirty = true;
|
|
|
|
if (alwaysSyncTC)
|
|
syncThreadContext();
|
|
|
|
// Enter into the RunningService state unless the
|
|
// simulation was stopped by a timer.
|
|
if (_kvmRun->exit_reason != KVM_EXIT_INTR) {
|
|
_status = RunningService;
|
|
} else {
|
|
++numExitSignal;
|
|
_status = Running;
|
|
}
|
|
|
|
// Service any pending instruction events. The vCPU should
|
|
// have exited in time for the event using the instruction
|
|
// counter configured by setupInstStop().
|
|
comInstEventQueue[0]->serviceEvents(ctrInsts);
|
|
system->instEventQueue.serviceEvents(system->totalNumInsts);
|
|
|
|
if (tryDrain())
|
|
_status = Idle;
|
|
} break;
|
|
|
|
default:
|
|
panic("BaseKvmCPU entered tick() in an illegal state (%i)\n",
|
|
_status);
|
|
}
|
|
|
|
// Schedule a new tick if we are still running
|
|
if (_status != Idle)
|
|
schedule(tickEvent, clockEdge(ticksToCycles(delay)));
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::kvmRunDrain()
|
|
{
|
|
// By default, the only thing we need to drain is a pending IO
|
|
// operation which assumes that we are in the
|
|
// RunningServiceCompletion state.
|
|
assert(_status == RunningServiceCompletion);
|
|
|
|
// Deliver the data from the pending IO operation and immediately
|
|
// exit.
|
|
return kvmRun(0);
|
|
}
|
|
|
|
uint64_t
|
|
BaseKvmCPU::getHostCycles() const
|
|
{
|
|
return hwCycles.read();
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::kvmRun(Tick ticks)
|
|
{
|
|
Tick ticksExecuted;
|
|
fatal_if(vcpuFD == -1,
|
|
"Trying to run a KVM CPU in a forked child process. "
|
|
"This is not supported.\n");
|
|
DPRINTF(KvmRun, "KVM: Executing for %i ticks\n", ticks);
|
|
|
|
if (ticks == 0) {
|
|
// Settings ticks == 0 is a special case which causes an entry
|
|
// into KVM that finishes pending operations (e.g., IO) and
|
|
// then immediately exits.
|
|
DPRINTF(KvmRun, "KVM: Delivering IO without full guest entry\n");
|
|
|
|
++numVMHalfEntries;
|
|
|
|
// Send a KVM_KICK_SIGNAL to the vCPU thread (i.e., this
|
|
// thread). The KVM control signal is masked while executing
|
|
// in gem5 and gets unmasked temporarily as when entering
|
|
// KVM. See setSignalMask() and setupSignalHandler().
|
|
kick();
|
|
|
|
// Start the vCPU. KVM will check for signals after completing
|
|
// pending operations (IO). Since the KVM_KICK_SIGNAL is
|
|
// pending, this forces an immediate exit to gem5 again. We
|
|
// don't bother to setup timers since this shouldn't actually
|
|
// execute any code (other than completing half-executed IO
|
|
// instructions) in the guest.
|
|
ioctlRun();
|
|
|
|
// We always execute at least one cycle to prevent the
|
|
// BaseKvmCPU::tick() to be rescheduled on the same tick
|
|
// twice.
|
|
ticksExecuted = clockPeriod();
|
|
} else {
|
|
// This method is executed as a result of a tick event. That
|
|
// means that the event queue will be locked when entering the
|
|
// method. We temporarily unlock the event queue to allow
|
|
// other threads to steal control of this thread to inject
|
|
// interrupts. They will typically lock the queue and then
|
|
// force an exit from KVM by kicking the vCPU.
|
|
EventQueue::ScopedRelease release(curEventQueue());
|
|
|
|
if (ticks < runTimer->resolution()) {
|
|
DPRINTF(KvmRun, "KVM: Adjusting tick count (%i -> %i)\n",
|
|
ticks, runTimer->resolution());
|
|
ticks = runTimer->resolution();
|
|
}
|
|
|
|
// Get hardware statistics after synchronizing contexts. The KVM
|
|
// state update might affect guest cycle counters.
|
|
uint64_t baseCycles(getHostCycles());
|
|
uint64_t baseInstrs(hwInstructions.read());
|
|
|
|
// Arm the run timer and start the cycle timer if it isn't
|
|
// controlled by the overflow timer. Starting/stopping the cycle
|
|
// timer automatically starts the other perf timers as they are in
|
|
// the same counter group.
|
|
runTimer->arm(ticks);
|
|
if (!perfControlledByTimer)
|
|
hwCycles.start();
|
|
|
|
ioctlRun();
|
|
|
|
runTimer->disarm();
|
|
if (!perfControlledByTimer)
|
|
hwCycles.stop();
|
|
|
|
// The control signal may have been delivered after we exited
|
|
// from KVM. It will be pending in that case since it is
|
|
// masked when we aren't executing in KVM. Discard it to make
|
|
// sure we don't deliver it immediately next time we try to
|
|
// enter into KVM.
|
|
discardPendingSignal(KVM_KICK_SIGNAL);
|
|
|
|
const uint64_t hostCyclesExecuted(getHostCycles() - baseCycles);
|
|
const uint64_t simCyclesExecuted(hostCyclesExecuted * hostFactor);
|
|
const uint64_t instsExecuted(hwInstructions.read() - baseInstrs);
|
|
ticksExecuted = runTimer->ticksFromHostCycles(hostCyclesExecuted);
|
|
|
|
/* Update statistics */
|
|
numCycles += simCyclesExecuted;;
|
|
numInsts += instsExecuted;
|
|
ctrInsts += instsExecuted;
|
|
system->totalNumInsts += instsExecuted;
|
|
|
|
DPRINTF(KvmRun,
|
|
"KVM: Executed %i instructions in %i cycles "
|
|
"(%i ticks, sim cycles: %i).\n",
|
|
instsExecuted, hostCyclesExecuted, ticksExecuted, simCyclesExecuted);
|
|
}
|
|
|
|
++numVMExits;
|
|
|
|
return ticksExecuted + flushCoalescedMMIO();
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::kvmNonMaskableInterrupt()
|
|
{
|
|
++numInterrupts;
|
|
if (ioctl(KVM_NMI) == -1)
|
|
panic("KVM: Failed to deliver NMI to virtual CPU\n");
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::kvmInterrupt(const struct kvm_interrupt &interrupt)
|
|
{
|
|
++numInterrupts;
|
|
if (ioctl(KVM_INTERRUPT, (void *)&interrupt) == -1)
|
|
panic("KVM: Failed to deliver interrupt to virtual CPU\n");
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::getRegisters(struct kvm_regs ®s) const
|
|
{
|
|
if (ioctl(KVM_GET_REGS, ®s) == -1)
|
|
panic("KVM: Failed to get guest registers\n");
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::setRegisters(const struct kvm_regs ®s)
|
|
{
|
|
if (ioctl(KVM_SET_REGS, (void *)®s) == -1)
|
|
panic("KVM: Failed to set guest registers\n");
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::getSpecialRegisters(struct kvm_sregs ®s) const
|
|
{
|
|
if (ioctl(KVM_GET_SREGS, ®s) == -1)
|
|
panic("KVM: Failed to get guest special registers\n");
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::setSpecialRegisters(const struct kvm_sregs ®s)
|
|
{
|
|
if (ioctl(KVM_SET_SREGS, (void *)®s) == -1)
|
|
panic("KVM: Failed to set guest special registers\n");
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::getFPUState(struct kvm_fpu &state) const
|
|
{
|
|
if (ioctl(KVM_GET_FPU, &state) == -1)
|
|
panic("KVM: Failed to get guest FPU state\n");
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::setFPUState(const struct kvm_fpu &state)
|
|
{
|
|
if (ioctl(KVM_SET_FPU, (void *)&state) == -1)
|
|
panic("KVM: Failed to set guest FPU state\n");
|
|
}
|
|
|
|
|
|
void
|
|
BaseKvmCPU::setOneReg(uint64_t id, const void *addr)
|
|
{
|
|
#ifdef KVM_SET_ONE_REG
|
|
struct kvm_one_reg reg;
|
|
reg.id = id;
|
|
reg.addr = (uint64_t)addr;
|
|
|
|
if (ioctl(KVM_SET_ONE_REG, ®) == -1) {
|
|
panic("KVM: Failed to set register (0x%x) value (errno: %i)\n",
|
|
id, errno);
|
|
}
|
|
#else
|
|
panic("KVM_SET_ONE_REG is unsupported on this platform.\n");
|
|
#endif
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::getOneReg(uint64_t id, void *addr) const
|
|
{
|
|
#ifdef KVM_GET_ONE_REG
|
|
struct kvm_one_reg reg;
|
|
reg.id = id;
|
|
reg.addr = (uint64_t)addr;
|
|
|
|
if (ioctl(KVM_GET_ONE_REG, ®) == -1) {
|
|
panic("KVM: Failed to get register (0x%x) value (errno: %i)\n",
|
|
id, errno);
|
|
}
|
|
#else
|
|
panic("KVM_GET_ONE_REG is unsupported on this platform.\n");
|
|
#endif
|
|
}
|
|
|
|
std::string
|
|
BaseKvmCPU::getAndFormatOneReg(uint64_t id) const
|
|
{
|
|
#ifdef KVM_GET_ONE_REG
|
|
std::ostringstream ss;
|
|
|
|
ss.setf(std::ios::hex, std::ios::basefield);
|
|
ss.setf(std::ios::showbase);
|
|
#define HANDLE_INTTYPE(len) \
|
|
case KVM_REG_SIZE_U ## len: { \
|
|
uint ## len ## _t value; \
|
|
getOneReg(id, &value); \
|
|
ss << value; \
|
|
} break
|
|
|
|
#define HANDLE_ARRAY(len) \
|
|
case KVM_REG_SIZE_U ## len: { \
|
|
uint8_t value[len / 8]; \
|
|
getOneReg(id, value); \
|
|
ccprintf(ss, "[0x%x", value[0]); \
|
|
for (int i = 1; i < len / 8; ++i) \
|
|
ccprintf(ss, ", 0x%x", value[i]); \
|
|
ccprintf(ss, "]"); \
|
|
} break
|
|
|
|
switch (id & KVM_REG_SIZE_MASK) {
|
|
HANDLE_INTTYPE(8);
|
|
HANDLE_INTTYPE(16);
|
|
HANDLE_INTTYPE(32);
|
|
HANDLE_INTTYPE(64);
|
|
HANDLE_ARRAY(128);
|
|
HANDLE_ARRAY(256);
|
|
HANDLE_ARRAY(512);
|
|
HANDLE_ARRAY(1024);
|
|
default:
|
|
ss << "??";
|
|
}
|
|
|
|
#undef HANDLE_INTTYPE
|
|
#undef HANDLE_ARRAY
|
|
|
|
return ss.str();
|
|
#else
|
|
panic("KVM_GET_ONE_REG is unsupported on this platform.\n");
|
|
#endif
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::syncThreadContext()
|
|
{
|
|
if (!kvmStateDirty)
|
|
return;
|
|
|
|
assert(!threadContextDirty);
|
|
|
|
updateThreadContext();
|
|
kvmStateDirty = false;
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::syncKvmState()
|
|
{
|
|
if (!threadContextDirty)
|
|
return;
|
|
|
|
assert(!kvmStateDirty);
|
|
|
|
updateKvmState();
|
|
threadContextDirty = false;
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::handleKvmExit()
|
|
{
|
|
DPRINTF(KvmRun, "handleKvmExit (exit_reason: %i)\n", _kvmRun->exit_reason);
|
|
assert(_status == RunningService);
|
|
|
|
// Switch into the running state by default. Individual handlers
|
|
// can override this.
|
|
_status = Running;
|
|
switch (_kvmRun->exit_reason) {
|
|
case KVM_EXIT_UNKNOWN:
|
|
return handleKvmExitUnknown();
|
|
|
|
case KVM_EXIT_EXCEPTION:
|
|
return handleKvmExitException();
|
|
|
|
case KVM_EXIT_IO:
|
|
_status = RunningServiceCompletion;
|
|
++numIO;
|
|
return handleKvmExitIO();
|
|
|
|
case KVM_EXIT_HYPERCALL:
|
|
++numHypercalls;
|
|
return handleKvmExitHypercall();
|
|
|
|
case KVM_EXIT_HLT:
|
|
/* The guest has halted and is waiting for interrupts */
|
|
DPRINTF(Kvm, "handleKvmExitHalt\n");
|
|
++numHalt;
|
|
|
|
// Suspend the thread until the next interrupt arrives
|
|
thread->suspend();
|
|
|
|
// This is actually ignored since the thread is suspended.
|
|
return 0;
|
|
|
|
case KVM_EXIT_MMIO:
|
|
_status = RunningServiceCompletion;
|
|
/* Service memory mapped IO requests */
|
|
DPRINTF(KvmIO, "KVM: Handling MMIO (w: %u, addr: 0x%x, len: %u)\n",
|
|
_kvmRun->mmio.is_write,
|
|
_kvmRun->mmio.phys_addr, _kvmRun->mmio.len);
|
|
|
|
++numMMIO;
|
|
return doMMIOAccess(_kvmRun->mmio.phys_addr, _kvmRun->mmio.data,
|
|
_kvmRun->mmio.len, _kvmRun->mmio.is_write);
|
|
|
|
case KVM_EXIT_IRQ_WINDOW_OPEN:
|
|
return handleKvmExitIRQWindowOpen();
|
|
|
|
case KVM_EXIT_FAIL_ENTRY:
|
|
return handleKvmExitFailEntry();
|
|
|
|
case KVM_EXIT_INTR:
|
|
/* KVM was interrupted by a signal, restart it in the next
|
|
* tick. */
|
|
return 0;
|
|
|
|
case KVM_EXIT_INTERNAL_ERROR:
|
|
panic("KVM: Internal error (suberror: %u)\n",
|
|
_kvmRun->internal.suberror);
|
|
|
|
default:
|
|
dump();
|
|
panic("KVM: Unexpected exit (exit_reason: %u)\n", _kvmRun->exit_reason);
|
|
}
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::handleKvmExitIO()
|
|
{
|
|
panic("KVM: Unhandled guest IO (dir: %i, size: %i, port: 0x%x, count: %i)\n",
|
|
_kvmRun->io.direction, _kvmRun->io.size,
|
|
_kvmRun->io.port, _kvmRun->io.count);
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::handleKvmExitHypercall()
|
|
{
|
|
panic("KVM: Unhandled hypercall\n");
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::handleKvmExitIRQWindowOpen()
|
|
{
|
|
warn("KVM: Unhandled IRQ window.\n");
|
|
return 0;
|
|
}
|
|
|
|
|
|
Tick
|
|
BaseKvmCPU::handleKvmExitUnknown()
|
|
{
|
|
dump();
|
|
panic("KVM: Unknown error when starting vCPU (hw reason: 0x%llx)\n",
|
|
_kvmRun->hw.hardware_exit_reason);
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::handleKvmExitException()
|
|
{
|
|
dump();
|
|
panic("KVM: Got exception when starting vCPU "
|
|
"(exception: %u, error_code: %u)\n",
|
|
_kvmRun->ex.exception, _kvmRun->ex.error_code);
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::handleKvmExitFailEntry()
|
|
{
|
|
dump();
|
|
panic("KVM: Failed to enter virtualized mode (hw reason: 0x%llx)\n",
|
|
_kvmRun->fail_entry.hardware_entry_failure_reason);
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::doMMIOAccess(Addr paddr, void *data, int size, bool write)
|
|
{
|
|
ThreadContext *tc(thread->getTC());
|
|
syncThreadContext();
|
|
|
|
Request mmio_req(paddr, size, Request::UNCACHEABLE, dataMasterId());
|
|
mmio_req.setContext(tc->contextId());
|
|
// Some architectures do need to massage physical addresses a bit
|
|
// before they are inserted into the memory system. This enables
|
|
// APIC accesses on x86 and m5ops where supported through a MMIO
|
|
// interface.
|
|
BaseTLB::Mode tlb_mode(write ? BaseTLB::Write : BaseTLB::Read);
|
|
Fault fault(tc->getDTBPtr()->finalizePhysical(&mmio_req, tc, tlb_mode));
|
|
if (fault != NoFault)
|
|
warn("Finalization of MMIO address failed: %s\n", fault->name());
|
|
|
|
|
|
const MemCmd cmd(write ? MemCmd::WriteReq : MemCmd::ReadReq);
|
|
Packet pkt(&mmio_req, cmd);
|
|
pkt.dataStatic(data);
|
|
|
|
if (mmio_req.isMmappedIpr()) {
|
|
// We currently assume that there is no need to migrate to a
|
|
// different event queue when doing IPRs. Currently, IPRs are
|
|
// only used for m5ops, so it should be a valid assumption.
|
|
const Cycles ipr_delay(write ?
|
|
TheISA::handleIprWrite(tc, &pkt) :
|
|
TheISA::handleIprRead(tc, &pkt));
|
|
threadContextDirty = true;
|
|
return clockPeriod() * ipr_delay;
|
|
} else {
|
|
// Temporarily lock and migrate to the event queue of the
|
|
// VM. This queue is assumed to "own" all devices we need to
|
|
// access if running in multi-core mode.
|
|
EventQueue::ScopedMigration migrate(vm.eventQueue());
|
|
|
|
return dataPort.sendAtomic(&pkt);
|
|
}
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::setSignalMask(const sigset_t *mask)
|
|
{
|
|
std::unique_ptr<struct kvm_signal_mask> kvm_mask;
|
|
|
|
if (mask) {
|
|
kvm_mask.reset((struct kvm_signal_mask *)operator new(
|
|
sizeof(struct kvm_signal_mask) + sizeof(*mask)));
|
|
// The kernel and the user-space headers have different ideas
|
|
// about the size of sigset_t. This seems like a massive hack,
|
|
// but is actually what qemu does.
|
|
assert(sizeof(*mask) >= 8);
|
|
kvm_mask->len = 8;
|
|
memcpy(kvm_mask->sigset, mask, kvm_mask->len);
|
|
}
|
|
|
|
if (ioctl(KVM_SET_SIGNAL_MASK, (void *)kvm_mask.get()) == -1)
|
|
panic("KVM: Failed to set vCPU signal mask (errno: %i)\n",
|
|
errno);
|
|
}
|
|
|
|
int
|
|
BaseKvmCPU::ioctl(int request, long p1) const
|
|
{
|
|
if (vcpuFD == -1)
|
|
panic("KVM: CPU ioctl called before initialization\n");
|
|
|
|
return ::ioctl(vcpuFD, request, p1);
|
|
}
|
|
|
|
Tick
|
|
BaseKvmCPU::flushCoalescedMMIO()
|
|
{
|
|
if (!mmioRing)
|
|
return 0;
|
|
|
|
DPRINTF(KvmIO, "KVM: Flushing the coalesced MMIO ring buffer\n");
|
|
|
|
// TODO: We might need to do synchronization when we start to
|
|
// support multiple CPUs
|
|
Tick ticks(0);
|
|
while (mmioRing->first != mmioRing->last) {
|
|
struct kvm_coalesced_mmio &ent(
|
|
mmioRing->coalesced_mmio[mmioRing->first]);
|
|
|
|
DPRINTF(KvmIO, "KVM: Handling coalesced MMIO (addr: 0x%x, len: %u)\n",
|
|
ent.phys_addr, ent.len);
|
|
|
|
++numCoalescedMMIO;
|
|
ticks += doMMIOAccess(ent.phys_addr, ent.data, ent.len, true);
|
|
|
|
mmioRing->first = (mmioRing->first + 1) % KVM_COALESCED_MMIO_MAX;
|
|
}
|
|
|
|
return ticks;
|
|
}
|
|
|
|
/**
|
|
* Dummy handler for KVM kick signals.
|
|
*
|
|
* @note This function is usually not called since the kernel doesn't
|
|
* seem to deliver signals when the signal is only unmasked when
|
|
* running in KVM. This doesn't matter though since we are only
|
|
* interested in getting KVM to exit, which happens as expected. See
|
|
* setupSignalHandler() and kvmRun() for details about KVM signal
|
|
* handling.
|
|
*/
|
|
static void
|
|
onKickSignal(int signo, siginfo_t *si, void *data)
|
|
{
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::setupSignalHandler()
|
|
{
|
|
struct sigaction sa;
|
|
|
|
memset(&sa, 0, sizeof(sa));
|
|
sa.sa_sigaction = onKickSignal;
|
|
sa.sa_flags = SA_SIGINFO | SA_RESTART;
|
|
if (sigaction(KVM_KICK_SIGNAL, &sa, NULL) == -1)
|
|
panic("KVM: Failed to setup vCPU timer signal handler\n");
|
|
|
|
sigset_t sigset;
|
|
if (pthread_sigmask(SIG_BLOCK, NULL, &sigset) == -1)
|
|
panic("KVM: Failed get signal mask\n");
|
|
|
|
// Request KVM to setup the same signal mask as we're currently
|
|
// running with except for the KVM control signal. We'll sometimes
|
|
// need to raise the KVM_KICK_SIGNAL to cause immediate exits from
|
|
// KVM after servicing IO requests. See kvmRun().
|
|
sigdelset(&sigset, KVM_KICK_SIGNAL);
|
|
setSignalMask(&sigset);
|
|
|
|
// Mask our control signals so they aren't delivered unless we're
|
|
// actually executing inside KVM.
|
|
sigaddset(&sigset, KVM_KICK_SIGNAL);
|
|
if (pthread_sigmask(SIG_SETMASK, &sigset, NULL) == -1)
|
|
panic("KVM: Failed mask the KVM control signals\n");
|
|
}
|
|
|
|
bool
|
|
BaseKvmCPU::discardPendingSignal(int signum) const
|
|
{
|
|
int discardedSignal;
|
|
|
|
// Setting the timeout to zero causes sigtimedwait to return
|
|
// immediately.
|
|
struct timespec timeout;
|
|
timeout.tv_sec = 0;
|
|
timeout.tv_nsec = 0;
|
|
|
|
sigset_t sigset;
|
|
sigemptyset(&sigset);
|
|
sigaddset(&sigset, signum);
|
|
|
|
do {
|
|
discardedSignal = sigtimedwait(&sigset, NULL, &timeout);
|
|
} while (discardedSignal == -1 && errno == EINTR);
|
|
|
|
if (discardedSignal == signum)
|
|
return true;
|
|
else if (discardedSignal == -1 && errno == EAGAIN)
|
|
return false;
|
|
else
|
|
panic("Unexpected return value from sigtimedwait: %i (errno: %i)\n",
|
|
discardedSignal, errno);
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::setupCounters()
|
|
{
|
|
DPRINTF(Kvm, "Attaching cycle counter...\n");
|
|
PerfKvmCounterConfig cfgCycles(PERF_TYPE_HARDWARE,
|
|
PERF_COUNT_HW_CPU_CYCLES);
|
|
cfgCycles.disabled(true)
|
|
.pinned(true);
|
|
|
|
// Try to exclude the host. We set both exclude_hv and
|
|
// exclude_host since different architectures use slightly
|
|
// different APIs in the kernel.
|
|
cfgCycles.exclude_hv(true)
|
|
.exclude_host(true);
|
|
|
|
if (perfControlledByTimer) {
|
|
// We need to configure the cycles counter to send overflows
|
|
// since we are going to use it to trigger timer signals that
|
|
// trap back into m5 from KVM. In practice, this means that we
|
|
// need to set some non-zero sample period that gets
|
|
// overridden when the timer is armed.
|
|
cfgCycles.wakeupEvents(1)
|
|
.samplePeriod(42);
|
|
}
|
|
|
|
hwCycles.attach(cfgCycles,
|
|
0); // TID (0 => currentThread)
|
|
|
|
setupInstCounter();
|
|
}
|
|
|
|
bool
|
|
BaseKvmCPU::tryDrain()
|
|
{
|
|
if (drainState() != DrainState::Draining)
|
|
return false;
|
|
|
|
if (!archIsDrained()) {
|
|
DPRINTF(Drain, "tryDrain: Architecture code is not ready.\n");
|
|
return false;
|
|
}
|
|
|
|
if (_status == Idle || _status == Running) {
|
|
DPRINTF(Drain,
|
|
"tryDrain: CPU transitioned into the Idle state, drain done\n");
|
|
signalDrainDone();
|
|
return true;
|
|
} else {
|
|
DPRINTF(Drain, "tryDrain: CPU not ready.\n");
|
|
return false;
|
|
}
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::ioctlRun()
|
|
{
|
|
if (ioctl(KVM_RUN) == -1) {
|
|
if (errno != EINTR)
|
|
panic("KVM: Failed to start virtual CPU (errno: %i)\n",
|
|
errno);
|
|
}
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::setupInstStop()
|
|
{
|
|
if (comInstEventQueue[0]->empty()) {
|
|
setupInstCounter(0);
|
|
} else {
|
|
const uint64_t next(comInstEventQueue[0]->nextTick());
|
|
|
|
assert(next > ctrInsts);
|
|
setupInstCounter(next - ctrInsts);
|
|
}
|
|
}
|
|
|
|
void
|
|
BaseKvmCPU::setupInstCounter(uint64_t period)
|
|
{
|
|
// No need to do anything if we aren't attaching for the first
|
|
// time or the period isn't changing.
|
|
if (period == activeInstPeriod && hwInstructions.attached())
|
|
return;
|
|
|
|
PerfKvmCounterConfig cfgInstructions(PERF_TYPE_HARDWARE,
|
|
PERF_COUNT_HW_INSTRUCTIONS);
|
|
|
|
// Try to exclude the host. We set both exclude_hv and
|
|
// exclude_host since different architectures use slightly
|
|
// different APIs in the kernel.
|
|
cfgInstructions.exclude_hv(true)
|
|
.exclude_host(true);
|
|
|
|
if (period) {
|
|
// Setup a sampling counter if that has been requested.
|
|
cfgInstructions.wakeupEvents(1)
|
|
.samplePeriod(period);
|
|
}
|
|
|
|
// We need to detach and re-attach the counter to reliably change
|
|
// sampling settings. See PerfKvmCounter::period() for details.
|
|
if (hwInstructions.attached())
|
|
hwInstructions.detach();
|
|
assert(hwCycles.attached());
|
|
hwInstructions.attach(cfgInstructions,
|
|
0, // TID (0 => currentThread)
|
|
hwCycles);
|
|
|
|
if (period)
|
|
hwInstructions.enableSignals(KVM_KICK_SIGNAL);
|
|
|
|
activeInstPeriod = period;
|
|
}
|