860155a5fc
This patch adds a check to ensure that the delay incurred by the bus is not simply disregarded, but accounted for by someone. At this point, all the modules do is to zero it out, and no additional time is spent. This highlights where the bus timing is simply dropped instead of being paid for. As a follow up, the locations identified in this patch should add this additional time to the packets in one way or another. For now it simply acts as a sanity check and highlights where the delay is simply ignored. Since no time is added, all regressions remain the same.
547 lines
19 KiB
C++
547 lines
19 KiB
C++
/*
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* Copyright (c) 2011-2013 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Andreas Hansson
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* William Wang
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*/
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/**
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* @file
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* Definition of a bus object.
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*/
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#include "base/misc.hh"
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#include "base/trace.hh"
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#include "debug/Bus.hh"
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#include "debug/BusAddrRanges.hh"
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#include "debug/Drain.hh"
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#include "mem/bus.hh"
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BaseBus::BaseBus(const BaseBusParams *p)
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: MemObject(p),
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headerCycles(p->header_cycles), width(p->width),
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gotAddrRanges(p->port_default_connection_count +
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p->port_master_connection_count, false),
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gotAllAddrRanges(false), defaultPortID(InvalidPortID),
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useDefaultRange(p->use_default_range),
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blockSize(p->block_size)
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{}
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BaseBus::~BaseBus()
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{
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for (MasterPortIter m = masterPorts.begin(); m != masterPorts.end();
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++m) {
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delete *m;
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}
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for (SlavePortIter s = slavePorts.begin(); s != slavePorts.end();
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++s) {
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delete *s;
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}
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}
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void
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BaseBus::init()
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{
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// determine the maximum peer block size, look at both the
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// connected master and slave modules
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uint32_t peer_block_size = 0;
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for (MasterPortConstIter m = masterPorts.begin(); m != masterPorts.end();
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++m) {
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peer_block_size = std::max((*m)->peerBlockSize(), peer_block_size);
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}
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for (SlavePortConstIter s = slavePorts.begin(); s != slavePorts.end();
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++s) {
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peer_block_size = std::max((*s)->peerBlockSize(), peer_block_size);
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}
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// if the peers do not have a block size, use the default value
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// set through the bus parameters
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if (peer_block_size != 0)
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blockSize = peer_block_size;
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// check if the block size is a value known to work
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if (!(blockSize == 16 || blockSize == 32 || blockSize == 64 ||
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blockSize == 128))
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warn_once("Block size is neither 16, 32, 64 or 128 bytes.\n");
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}
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BaseMasterPort &
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BaseBus::getMasterPort(const std::string &if_name, PortID idx)
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{
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if (if_name == "master" && idx < masterPorts.size()) {
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// the master port index translates directly to the vector position
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return *masterPorts[idx];
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} else if (if_name == "default") {
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return *masterPorts[defaultPortID];
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} else {
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return MemObject::getMasterPort(if_name, idx);
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}
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}
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BaseSlavePort &
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BaseBus::getSlavePort(const std::string &if_name, PortID idx)
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{
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if (if_name == "slave" && idx < slavePorts.size()) {
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// the slave port index translates directly to the vector position
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return *slavePorts[idx];
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} else {
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return MemObject::getSlavePort(if_name, idx);
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}
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}
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void
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BaseBus::calcPacketTiming(PacketPtr pkt)
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{
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// the bus will be called at a time that is not necessarily
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// coinciding with its own clock, so start by determining how long
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// until the next clock edge (could be zero)
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Tick offset = nextCycle() - curTick();
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// determine how many cycles are needed to send the data
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unsigned dataCycles = pkt->hasData() ? divCeil(pkt->getSize(), width) : 0;
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// before setting the bus delay fields of the packet, ensure that
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// the delay from any previous bus has been accounted for
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if (pkt->busFirstWordDelay != 0 || pkt->busLastWordDelay != 0)
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panic("Packet %s already has bus delay (%d, %d) that should be "
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"accounted for.\n", pkt->cmdString(), pkt->busFirstWordDelay,
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pkt->busLastWordDelay);
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// The first word will be delivered on the cycle after the header.
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pkt->busFirstWordDelay = (headerCycles + 1) * clockPeriod() + offset;
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// Note that currently busLastWordDelay can be smaller than
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// busFirstWordDelay if the packet has no data
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pkt->busLastWordDelay = (headerCycles + dataCycles) * clockPeriod() +
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offset;
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}
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template <typename PortClass>
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BaseBus::Layer<PortClass>::Layer(BaseBus& _bus, const std::string& _name) :
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Drainable(),
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bus(_bus), _name(_name), state(IDLE), drainManager(NULL),
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releaseEvent(this)
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{
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}
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template <typename PortClass>
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void BaseBus::Layer<PortClass>::occupyLayer(Tick until)
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{
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// ensure the state is busy or in retry and never idle at this
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// point, as the bus should transition from idle as soon as it has
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// decided to forward the packet to prevent any follow-on calls to
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// sendTiming seeing an unoccupied bus
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assert(state != IDLE);
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// note that we do not change the bus state here, if we are going
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// from idle to busy it is handled by tryTiming, and if we
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// are in retry we should remain in retry such that
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// succeededTiming still sees the accurate state
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// until should never be 0 as express snoops never occupy the bus
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assert(until != 0);
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bus.schedule(releaseEvent, until);
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DPRINTF(BaseBus, "The bus is now busy from tick %d to %d\n",
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curTick(), until);
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}
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template <typename PortClass>
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bool
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BaseBus::Layer<PortClass>::tryTiming(PortClass* port)
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{
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// first we see if the bus is busy, next we check if we are in a
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// retry with a port other than the current one
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if (state == BUSY || (state == RETRY && port != retryList.front())) {
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// put the port at the end of the retry list
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retryList.push_back(port);
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return false;
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}
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// update the state which is shared for request, response and
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// snoop responses, if we were idle we are now busy, if we are in
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// a retry, then do not change
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if (state == IDLE)
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state = BUSY;
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return true;
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::succeededTiming(Tick busy_time)
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{
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// if a retrying port succeeded, also take it off the retry list
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if (state == RETRY) {
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DPRINTF(BaseBus, "Remove retry from list %s\n",
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retryList.front()->name());
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retryList.pop_front();
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state = BUSY;
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}
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// we should either have gone from idle to busy in the
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// tryTiming test, or just gone from a retry to busy
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assert(state == BUSY);
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// occupy the bus accordingly
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occupyLayer(busy_time);
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::failedTiming(PortClass* port, Tick busy_time)
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{
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// if we are not in a retry, i.e. busy (but never idle), or we are
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// in a retry but not for the current port, then add the port at
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// the end of the retry list
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if (state != RETRY || port != retryList.front()) {
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retryList.push_back(port);
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}
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// even if we retried the current one and did not succeed,
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// we are no longer retrying but instead busy
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state = BUSY;
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// occupy the bus accordingly
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occupyLayer(busy_time);
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::releaseLayer()
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{
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// releasing the bus means we should now be idle
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assert(state == BUSY);
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assert(!releaseEvent.scheduled());
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// update the state
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state = IDLE;
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// bus is now idle, so if someone is waiting we can retry
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if (!retryList.empty()) {
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// note that we block (return false on recvTiming) both
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// because the bus is busy and because the destination is
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// busy, and in the latter case the bus may be released before
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// we see a retry from the destination
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retryWaiting();
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} else if (drainManager) {
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DPRINTF(Drain, "Bus done draining, signaling drain manager\n");
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//If we weren't able to drain before, do it now.
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drainManager->signalDrainDone();
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// Clear the drain event once we're done with it.
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drainManager = NULL;
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}
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::retryWaiting()
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{
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// this should never be called with an empty retry list
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assert(!retryList.empty());
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// we always go to retrying from idle
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assert(state == IDLE);
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// update the state which is shared for request, response and
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// snoop responses
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state = RETRY;
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// note that we might have blocked on the receiving port being
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// busy (rather than the bus itself) and now call retry before the
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// destination called retry on the bus
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retryList.front()->sendRetry();
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// If the bus is still in the retry state, sendTiming wasn't
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// called in zero time (e.g. the cache does this)
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if (state == RETRY) {
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retryList.pop_front();
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//Burn a cycle for the missed grant.
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// update the state which is shared for request, response and
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// snoop responses
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state = BUSY;
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// occupy the bus layer until the next cycle ends
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occupyLayer(bus.clockEdge(Cycles(1)));
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}
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::recvRetry()
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{
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// we got a retry from a peer that we tried to send something to
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// and failed, but we sent it on the account of someone else, and
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// that source port should be on our retry list, however if the
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// bus layer is released before this happens and the retry (from
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// the bus point of view) is successful then this no longer holds
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// and we could in fact have an empty retry list
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if (retryList.empty())
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return;
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// if the bus layer is idle
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if (state == IDLE) {
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// note that we do not care who told us to retry at the moment, we
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// merely let the first one on the retry list go
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retryWaiting();
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}
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}
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PortID
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BaseBus::findPort(Addr addr)
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{
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// we should never see any address lookups before we've got the
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// ranges of all connected slave modules
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assert(gotAllAddrRanges);
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// Check the cache
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PortID dest_id = checkPortCache(addr);
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if (dest_id != InvalidPortID)
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return dest_id;
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// Check the address map interval tree
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PortMapConstIter i = portMap.find(addr);
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if (i != portMap.end()) {
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dest_id = i->second;
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updatePortCache(dest_id, i->first);
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return dest_id;
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}
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// Check if this matches the default range
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if (useDefaultRange) {
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if (defaultRange.contains(addr)) {
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DPRINTF(BusAddrRanges, " found addr %#llx on default\n",
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addr);
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return defaultPortID;
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}
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} else if (defaultPortID != InvalidPortID) {
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DPRINTF(BusAddrRanges, "Unable to find destination for addr %#llx, "
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"will use default port\n", addr);
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return defaultPortID;
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}
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// we should use the range for the default port and it did not
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// match, or the default port is not set
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fatal("Unable to find destination for addr %#llx on bus %s\n", addr,
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name());
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}
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/** Function called by the port when the bus is receiving a range change.*/
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void
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BaseBus::recvRangeChange(PortID master_port_id)
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{
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DPRINTF(BusAddrRanges, "Received range change from slave port %s\n",
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masterPorts[master_port_id]->getSlavePort().name());
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// remember that we got a range from this master port and thus the
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// connected slave module
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gotAddrRanges[master_port_id] = true;
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// update the global flag
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if (!gotAllAddrRanges) {
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// take a logical AND of all the ports and see if we got
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// ranges from everyone
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gotAllAddrRanges = true;
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std::vector<bool>::const_iterator r = gotAddrRanges.begin();
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while (gotAllAddrRanges && r != gotAddrRanges.end()) {
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gotAllAddrRanges &= *r++;
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}
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if (gotAllAddrRanges)
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DPRINTF(BusAddrRanges, "Got address ranges from all slaves\n");
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}
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// note that we could get the range from the default port at any
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// point in time, and we cannot assume that the default range is
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// set before the other ones are, so we do additional checks once
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// all ranges are provided
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if (master_port_id == defaultPortID) {
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// only update if we are indeed checking ranges for the
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// default port since the port might not have a valid range
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// otherwise
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if (useDefaultRange) {
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AddrRangeList ranges = masterPorts[master_port_id]->getAddrRanges();
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if (ranges.size() != 1)
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fatal("Bus %s may only have a single default range",
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name());
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defaultRange = ranges.front();
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}
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} else {
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// the ports are allowed to update their address ranges
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// dynamically, so remove any existing entries
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if (gotAddrRanges[master_port_id]) {
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for (PortMapIter p = portMap.begin(); p != portMap.end(); ) {
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if (p->second == master_port_id)
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// erasing invalidates the iterator, so advance it
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// before the deletion takes place
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portMap.erase(p++);
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else
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p++;
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}
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}
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AddrRangeList ranges = masterPorts[master_port_id]->getAddrRanges();
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for (AddrRangeConstIter r = ranges.begin(); r != ranges.end(); ++r) {
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DPRINTF(BusAddrRanges, "Adding range %s for id %d\n",
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r->to_string(), master_port_id);
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if (portMap.insert(*r, master_port_id) == portMap.end()) {
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PortID conflict_id = portMap.find(*r)->second;
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fatal("%s has two ports with same range:\n\t%s\n\t%s\n",
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name(),
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masterPorts[master_port_id]->getSlavePort().name(),
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masterPorts[conflict_id]->getSlavePort().name());
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}
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}
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}
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// if we have received ranges from all our neighbouring slave
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// modules, go ahead and tell our connected master modules in
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// turn, this effectively assumes a tree structure of the system
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if (gotAllAddrRanges) {
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// also check that no range partially overlaps with the
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// default range, this has to be done after all ranges are set
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// as there are no guarantees for when the default range is
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// update with respect to the other ones
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if (useDefaultRange) {
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for (PortID port_id = 0; port_id < masterPorts.size(); ++port_id) {
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if (port_id == defaultPortID) {
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if (!gotAddrRanges[port_id])
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fatal("Bus %s uses default range, but none provided",
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name());
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} else {
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AddrRangeList ranges =
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masterPorts[port_id]->getAddrRanges();
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for (AddrRangeConstIter r = ranges.begin();
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r != ranges.end(); ++r) {
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// see if the new range is partially
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// overlapping the default range
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if (r->intersects(defaultRange) &&
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!r->isSubset(defaultRange))
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fatal("Range %s intersects the " \
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"default range of %s but is not a " \
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"subset\n", r->to_string(), name());
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}
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}
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}
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}
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// tell all our neighbouring master ports that our address
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// ranges have changed
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for (SlavePortConstIter s = slavePorts.begin(); s != slavePorts.end();
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++s)
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(*s)->sendRangeChange();
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}
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clearPortCache();
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}
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AddrRangeList
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BaseBus::getAddrRanges() const
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{
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// we should never be asked without first having sent a range
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// change, and the latter is only done once we have all the ranges
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// of the connected devices
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assert(gotAllAddrRanges);
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// at the moment, this never happens, as there are no cycles in
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// the range queries and no devices on the master side of a bus
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// (CPU, cache, bridge etc) actually care about the ranges of the
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// ports they are connected to
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DPRINTF(BusAddrRanges, "Received address range request, returning:\n");
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// start out with the default range
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AddrRangeList ranges;
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if (useDefaultRange) {
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ranges.push_back(defaultRange);
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DPRINTF(BusAddrRanges, " -- Default %s\n", defaultRange.to_string());
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}
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// add any range that is not a subset of the default range
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for (PortMapConstIter p = portMap.begin(); p != portMap.end(); ++p) {
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|
if (useDefaultRange && p->first.isSubset(defaultRange)) {
|
|
DPRINTF(BusAddrRanges, " -- %s is a subset of default\n",
|
|
p->first.to_string());
|
|
} else {
|
|
ranges.push_back(p->first);
|
|
DPRINTF(BusAddrRanges, " -- %s\n", p->first.to_string());
|
|
}
|
|
}
|
|
|
|
return ranges;
|
|
}
|
|
|
|
unsigned
|
|
BaseBus::deviceBlockSize() const
|
|
{
|
|
return blockSize;
|
|
}
|
|
|
|
template <typename PortClass>
|
|
unsigned int
|
|
BaseBus::Layer<PortClass>::drain(DrainManager *dm)
|
|
{
|
|
//We should check that we're not "doing" anything, and that noone is
|
|
//waiting. We might be idle but have someone waiting if the device we
|
|
//contacted for a retry didn't actually retry.
|
|
if (!retryList.empty() || state != IDLE) {
|
|
DPRINTF(Drain, "Bus not drained\n");
|
|
drainManager = dm;
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Bus layer template instantiations. Could be removed with _impl.hh
|
|
* file, but since there are only two given options (MasterPort and
|
|
* SlavePort) it seems a bit excessive at this point.
|
|
*/
|
|
template class BaseBus::Layer<SlavePort>;
|
|
template class BaseBus::Layer<MasterPort>;
|