283be34a99
Added drain functions to the RTC and 8254 timer so that periodic interrupts stop when the system is draining. This patch is needed to checkpoint in timing mode. Otherwise under certain situations, the event queue will never be completely empty.
299 lines
8 KiB
C++
299 lines
8 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Andrew Schultz
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* Miguel Serrano
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*/
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#include <sys/time.h>
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#include <time.h>
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#include <string>
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#include "base/bitfield.hh"
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#include "base/time.hh"
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#include "base/trace.hh"
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#include "dev/mc146818.hh"
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#include "dev/rtcreg.h"
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#include "sim/sim_object.hh"
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using namespace std;
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static uint8_t
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bcdize(uint8_t val)
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{
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uint8_t result;
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result = val % 10;
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result += (val / 10) << 4;
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return result;
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}
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static uint8_t
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unbcdize(uint8_t val)
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{
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uint8_t result;
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result = val & 0xf;
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result += (val >> 4) * 10;
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return result;
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}
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void
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MC146818::setTime(const struct tm time)
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{
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curTime = time;
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year = time.tm_year;
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// Unix is 0-11 for month, data seet says start at 1
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mon = time.tm_mon + 1;
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mday = time.tm_mday;
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hour = time.tm_hour;
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min = time.tm_min;
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sec = time.tm_sec;
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// Datasheet says 1 is sunday
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wday = time.tm_wday + 1;
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if (!(stat_regB & RTCB_BIN)) {
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// The datasheet says that the year field can be either BCD or
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// years since 1900. Linux seems to be happy with years since
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// 1900.
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year = bcdize(year % 100);
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mon = bcdize(mon);
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mday = bcdize(mday);
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hour = bcdize(hour);
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min = bcdize(min);
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sec = bcdize(sec);
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}
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}
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MC146818::MC146818(EventManager *em, const string &n, const struct tm time,
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bool bcd, Tick frequency)
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: EventManager(em), _name(n), event(this, frequency), tickEvent(this)
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{
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memset(clock_data, 0, sizeof(clock_data));
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stat_regA = RTCA_32768HZ | RTCA_1024HZ;
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stat_regB = RTCB_PRDC_IE | RTCB_24HR;
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if (!bcd)
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stat_regB |= RTCB_BIN;
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setTime(time);
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DPRINTFN("Real-time clock set to %s", asctime(&time));
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}
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MC146818::~MC146818()
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{
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if (tickEvent.scheduled()) {
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deschedule(tickEvent);
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}
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if (event.scheduled()) {
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deschedule(event);
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}
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}
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void
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MC146818::writeData(const uint8_t addr, const uint8_t data)
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{
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if (addr < RTC_STAT_REGA) {
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clock_data[addr] = data;
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curTime.tm_sec = unbcdize(sec);
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curTime.tm_min = unbcdize(min);
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curTime.tm_hour = unbcdize(hour);
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curTime.tm_mday = unbcdize(mday);
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curTime.tm_mon = unbcdize(mon) - 1;
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curTime.tm_year = ((unbcdize(year) + 50) % 100) + 1950;
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curTime.tm_wday = unbcdize(wday) - 1;
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} else {
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switch (addr) {
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case RTC_STAT_REGA:
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// The "update in progress" bit is read only.
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if ((data & ~RTCA_UIP) != (RTCA_32768HZ | RTCA_1024HZ))
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panic("Unimplemented RTC register A value write!\n");
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replaceBits(stat_regA, data, 6, 0);
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break;
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case RTC_STAT_REGB:
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if ((data & ~(RTCB_PRDC_IE | RTCB_SQWE)) != RTCB_24HR)
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panic("Write to RTC reg B bits that are not implemented!\n");
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if (data & RTCB_PRDC_IE) {
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if (!event.scheduled())
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event.scheduleIntr();
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} else {
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if (event.scheduled())
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deschedule(event);
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}
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stat_regB = data;
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break;
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case RTC_STAT_REGC:
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case RTC_STAT_REGD:
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panic("RTC status registers C and D are not implemented.\n");
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break;
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}
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}
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}
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uint8_t
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MC146818::readData(uint8_t addr)
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{
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if (addr < RTC_STAT_REGA)
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return clock_data[addr];
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else {
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switch (addr) {
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case RTC_STAT_REGA:
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// toggle UIP bit for linux
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stat_regA ^= RTCA_UIP;
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return stat_regA;
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break;
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case RTC_STAT_REGB:
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return stat_regB;
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break;
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case RTC_STAT_REGC:
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case RTC_STAT_REGD:
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return 0x00;
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break;
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default:
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panic("Shouldn't be here");
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}
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}
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}
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static time_t
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mkutctime(struct tm *time)
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{
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time_t ret;
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char *tz;
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tz = getenv("TZ");
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setenv("TZ", "", 1);
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tzset();
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ret = mktime(time);
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if (tz)
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setenv("TZ", tz, 1);
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else
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unsetenv("TZ");
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tzset();
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return ret;
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}
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void
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MC146818::tickClock()
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{
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if (stat_regB & RTCB_NO_UPDT)
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return;
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time_t calTime = mkutctime(&curTime);
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calTime++;
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setTime(*gmtime(&calTime));
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}
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unsigned int
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MC146818::drain(Event *de)
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{
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if (event.scheduled()) {
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rtcTimerInterruptTickOffset = event.when() - curTick;
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rtcClockTickOffset = event.when() - curTick;
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deschedule(event);
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}
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if (tickEvent.scheduled()) {
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deschedule(tickEvent);
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}
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return 0;
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}
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void
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MC146818::serialize(const string &base, ostream &os)
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{
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arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data));
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paramOut(os, base + ".stat_regA", stat_regA);
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paramOut(os, base + ".stat_regB", stat_regB);
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//
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// save the timer tick and rtc clock tick values to correctly reschedule
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// them during unserialize
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//
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SERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
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SERIALIZE_SCALAR(rtcClockTickOffset);
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}
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void
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MC146818::unserialize(const string &base, Checkpoint *cp,
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const string §ion)
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{
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arrayParamIn(cp, section, base + ".clock_data", clock_data,
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sizeof(clock_data));
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paramIn(cp, section, base + ".stat_regA", stat_regA);
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paramIn(cp, section, base + ".stat_regB", stat_regB);
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//
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// properly schedule the timer and rtc clock events
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//
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Tick rtcTimerInterruptTickOffset;
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UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
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reschedule(event, curTick + rtcTimerInterruptTickOffset);
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Tick rtcClockTickOffset;
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UNSERIALIZE_SCALAR(rtcClockTickOffset);
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reschedule(tickEvent, curTick + rtcClockTickOffset);
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}
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MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i)
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: parent(_parent), interval(i)
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{
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DPRINTF(MC146818, "RTC Event Initilizing\n");
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parent->schedule(this, curTick + interval);
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}
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void
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MC146818::RTCEvent::scheduleIntr()
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{
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parent->schedule(this, curTick + interval);
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}
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void
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MC146818::RTCEvent::process()
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{
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DPRINTF(MC146818, "RTC Timer Interrupt\n");
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parent->schedule(this, curTick + interval);
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parent->handleEvent();
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}
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const char *
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MC146818::RTCEvent::description() const
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{
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return "RTC interrupt";
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}
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void
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MC146818::RTCTickEvent::process()
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{
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DPRINTF(MC146818, "RTC clock tick\n");
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parent->schedule(this, curTick + SimClock::Int::s);
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parent->tickClock();
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}
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const char *
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MC146818::RTCTickEvent::description() const
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{
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return "RTC clock tick";
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}
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