gem5/src/arch
2008-10-12 13:45:21 -07:00
..
alpha Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. 2008-10-12 09:09:56 -07:00
mips Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. 2008-10-12 09:09:56 -07:00
sparc Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. 2008-10-12 09:09:56 -07:00
x86 X86: Make the local APIC process interrupts and send them to the CPU. 2008-10-12 13:45:21 -07:00
isa_parser.py style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
isa_specific.hh style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
micro_asm.py Microcode: Fix a silent typo error in the microcode assembler. 2008-10-09 00:07:38 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript ISA parser: Make the isa parser generate MaxInstSrcRegs and MaxInstDestRegs. 2007-11-08 18:51:50 -08:00