c2fcac7c0d
cpu/base_dyn_inst.cc:
Remove unused commented out code.
cpu/base_dyn_inst.hh:
Fix up comments.
cpu/beta_cpu/2bit_local_pred.cc:
Reorder code to match header file.
cpu/beta_cpu/2bit_local_pred.hh:
Update comments.
cpu/beta_cpu/alpha_dyn_inst.hh:
Remove useless comments.
cpu/beta_cpu/alpha_dyn_inst_impl.hh:
cpu/beta_cpu/alpha_full_cpu_impl.hh:
cpu/beta_cpu/comm.hh:
cpu/beta_cpu/iew_impl.hh:
Remove unused commented code.
cpu/beta_cpu/alpha_full_cpu.hh:
Remove obsolete comment.
cpu/beta_cpu/alpha_impl.hh:
cpu/beta_cpu/full_cpu.hh:
Alphabetize includes.
cpu/beta_cpu/bpred_unit.hh:
Remove unused global history code.
cpu/beta_cpu/btb.hh:
cpu/beta_cpu/free_list.hh:
Use full path in #defines.
cpu/beta_cpu/commit.hh:
cpu/beta_cpu/decode.hh:
Reorder functions.
cpu/beta_cpu/commit_impl.hh:
Remove obsolete commented code.
cpu/beta_cpu/fetch.hh:
Remove obsolete comments.
cpu/beta_cpu/fetch_impl.hh:
cpu/beta_cpu/rename_impl.hh:
Remove commented code.
cpu/beta_cpu/full_cpu.cc:
Remove useless defines.
cpu/beta_cpu/inst_queue.hh:
Use full path for #defines.
cpu/beta_cpu/inst_queue_impl.hh:
Reorder functions to match header file.
cpu/beta_cpu/mem_dep_unit.hh:
Use full path name for #defines.
cpu/beta_cpu/ras.hh:
Use full path names for #defines. Remove mod operation.
cpu/beta_cpu/regfile.hh:
Remove unused commented code, fix up current comments.
cpu/beta_cpu/tournament_pred.cc:
cpu/beta_cpu/tournament_pred.hh:
Update programming style.
--HG--
extra : convert_revision : fb9d18a853f58a1108ff827e3c123d5b52a0608a
135 lines
2.6 KiB
C++
135 lines
2.6 KiB
C++
|
|
#include "cpu/beta_cpu/alpha_dyn_inst.hh"
|
|
|
|
template <class Impl>
|
|
AlphaDynInst<Impl>::AlphaDynInst(MachInst inst, Addr PC, Addr Pred_PC,
|
|
InstSeqNum seq_num, FullCPU *cpu)
|
|
: BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
|
|
{
|
|
// Make sure to have the renamed register entries set to the same
|
|
// as the normal register entries. It will allow the IQ to work
|
|
// without any modifications.
|
|
for (int i = 0; i < this->staticInst->numDestRegs(); i++)
|
|
{
|
|
_destRegIdx[i] = this->staticInst->destRegIdx(i);
|
|
}
|
|
|
|
for (int i = 0; i < this->staticInst->numSrcRegs(); i++)
|
|
{
|
|
_srcRegIdx[i] = this->staticInst->srcRegIdx(i);
|
|
this->_readySrcRegIdx[i] = 0;
|
|
}
|
|
|
|
}
|
|
|
|
template <class Impl>
|
|
AlphaDynInst<Impl>::AlphaDynInst(StaticInstPtr<AlphaISA> &_staticInst)
|
|
: BaseDynInst<Impl>(_staticInst)
|
|
{
|
|
// Make sure to have the renamed register entries set to the same
|
|
// as the normal register entries. It will allow the IQ to work
|
|
// without any modifications.
|
|
for (int i = 0; i < _staticInst->numDestRegs(); i++)
|
|
{
|
|
_destRegIdx[i] = _staticInst->destRegIdx(i);
|
|
}
|
|
|
|
for (int i = 0; i < _staticInst->numSrcRegs(); i++)
|
|
{
|
|
_srcRegIdx[i] = _staticInst->srcRegIdx(i);
|
|
}
|
|
}
|
|
|
|
template <class Impl>
|
|
uint64_t
|
|
AlphaDynInst<Impl>::readUniq()
|
|
{
|
|
return this->cpu->readUniq();
|
|
}
|
|
|
|
template <class Impl>
|
|
void
|
|
AlphaDynInst<Impl>::setUniq(uint64_t val)
|
|
{
|
|
this->cpu->setUniq(val);
|
|
}
|
|
|
|
template <class Impl>
|
|
uint64_t
|
|
AlphaDynInst<Impl>::readFpcr()
|
|
{
|
|
return this->cpu->readFpcr();
|
|
}
|
|
|
|
template <class Impl>
|
|
void
|
|
AlphaDynInst<Impl>::setFpcr(uint64_t val)
|
|
{
|
|
this->cpu->setFpcr(val);
|
|
}
|
|
|
|
#ifdef FULL_SYSTEM
|
|
template <class Impl>
|
|
uint64_t
|
|
AlphaDynInst<Impl>::readIpr(int idx, Fault &fault)
|
|
{
|
|
return this->cpu->readIpr(idx, fault);
|
|
}
|
|
|
|
template <class Impl>
|
|
Fault
|
|
AlphaDynInst<Impl>::setIpr(int idx, uint64_t val)
|
|
{
|
|
return this->cpu->setIpr(idx, val);
|
|
}
|
|
|
|
template <class Impl>
|
|
Fault
|
|
AlphaDynInst<Impl>::hwrei()
|
|
{
|
|
return this->cpu->hwrei();
|
|
}
|
|
|
|
template <class Impl>
|
|
int
|
|
AlphaDynInst<Impl>::readIntrFlag()
|
|
{
|
|
return this->cpu->readIntrFlag();
|
|
}
|
|
|
|
template <class Impl>
|
|
void
|
|
AlphaDynInst<Impl>::setIntrFlag(int val)
|
|
{
|
|
this->cpu->setIntrFlag(val);
|
|
}
|
|
|
|
template <class Impl>
|
|
bool
|
|
AlphaDynInst<Impl>::inPalMode()
|
|
{
|
|
return this->cpu->inPalMode();
|
|
}
|
|
|
|
template <class Impl>
|
|
void
|
|
AlphaDynInst<Impl>::trap(Fault fault)
|
|
{
|
|
this->cpu->trap(fault);
|
|
}
|
|
|
|
template <class Impl>
|
|
bool
|
|
AlphaDynInst<Impl>::simPalCheck(int palFunc)
|
|
{
|
|
return this->cpu->simPalCheck(palFunc);
|
|
}
|
|
#else
|
|
template <class Impl>
|
|
void
|
|
AlphaDynInst<Impl>::syscall()
|
|
{
|
|
this->cpu->syscall(this->threadNumber);
|
|
}
|
|
#endif
|
|
|