gem5/src/arch/x86/isa/insts/control_transfer
Gabe Black e410a925df X86: Start implementing segmentation support.
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.

--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
2007-08-04 20:12:54 -07:00
..
__init__.py Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
call.py X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00
conditional_jump.py X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00
interrupts_and_exceptions.py Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
jump.py X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00
loop.py Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
xreturn.py X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00