gem5/util/cpt_upgraders/arm-ccregs.py
Curtis Dunham 87b9da2df4 sim: tag-based checkpoint versioning
This commit addresses gem5 checkpoints' linear versioning bottleneck.
Since development is distributed across many private trees, there exists
a sort of 'race' for checkpoint version numbers: internally a checkpoint
version may be used but then resynchronizing with the external tree causes
a conflict on that version.  This change replaces the linear version number
with a set of unique strings called tags.  Now the only conflicts that can
arise are of tag names, where collisions are much easier to avoid.

The checkpoint upgrader (util/cpt_upgrader.py) upgrades the version
representation, as one would expect. Each tag version implements its
upgrader code in a python file in the util/cpt_upgraders directory
rather than adding a function to the upgrader script itself.

The version tags are stored in the 'Globals' section rather than 'root'
(as the version was previously) because 'Globals' gets unserialized
first and can provide a warning before any other unserialization errors
can occur.
2015-09-02 15:23:30 -05:00

28 lines
977 B
Python

# Use condition code registers for the ARM architecture.
# Previously the integer register file was used for these registers.
def upgrader(cpt):
if cpt.get('root','isa') == 'arm':
for sec in cpt.sections():
import re
re_cpu_match = re.match('^(.*sys.*\.cpu[^.]*)\.xc\.(.+)$', sec)
# Search for all the execution contexts
if not re_cpu_match:
continue
items = []
for (item,value) in cpt.items(sec):
items.append(item)
if 'ccRegs' not in items:
intRegs = cpt.get(sec, 'intRegs').split()
# Move those 5 integer registers to the ccRegs register file
ccRegs = intRegs[38:43]
del intRegs[38:43]
ccRegs.append('0') # CCREG_ZERO
cpt.set(sec, 'intRegs', ' '.join(intRegs))
cpt.set(sec, 'ccRegs', ' '.join(ccRegs))
legacy_version = 13