aa19b2e7bc
use memcpy instead of bcopy
s/u_int32_t/uint32_t/g
fixup endian code to work with solaris
hack to make sure htole() works... Nate, have a good idea to fix this?
src/arch/sparc/faults.cc:
set the reset address to be 40 bits. Makes PC printing easier at least for now.
src/arch/sparc/isa/base.isa:
fix endian issues with condition codes
src/arch/sparc/tlb.hh:
add implemented physical addres constants
src/arch/sparc/utility.hh:
add tlb.hh to utilities
src/base/loader/raw_object.cc:
add a symbol <filename>_start to the symbol table for binaries files
src/base/remote_gdb.cc:
use memcpy instead of bcopy
src/cpu/exetrace.cc:
clean up printing a bit more
src/cpu/m5legion_interface.h:
add tons to the shared interface
src/dev/ethertap.cc:
s/u_int32_t/uint32_t/g
src/dev/ide_atareg.h:
fixup endian code to work with solaris
src/dev/pcidev.cc:
src/sim/param.hh:
hack to make sure htole() works...
--HG--
extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
87 lines
3 KiB
C++
87 lines
3 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#ifndef __ARCH_SPARC_TLB_HH__
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#define __ARCH_SPARC_TLB_HH__
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#include "base/misc.hh"
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#include "mem/request.hh"
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#include "sim/faults.hh"
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#include "sim/sim_object.hh"
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class ThreadContext;
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namespace SparcISA
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{
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const int PAddrImplBits = 40;
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const Addr PAddrImplMask = (ULL(1) << PAddrImplBits) - 1;
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class TLB : public SimObject
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{
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public:
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TLB(const std::string &name, int size) : SimObject(name)
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{
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}
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};
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class ITB : public TLB
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{
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public:
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ITB(const std::string &name, int size) : TLB(name, size)
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{
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}
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Fault translate(RequestPtr &req, ThreadContext *tc) const
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{
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//For now, always assume the address is already physical.
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//Also assume that there are 40 bits of physical address space.
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req->setPaddr(req->getVaddr() & PAddrImplMask);
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return NoFault;
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}
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};
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class DTB : public TLB
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{
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public:
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DTB(const std::string &name, int size) : TLB(name, size)
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{
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}
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Fault translate(RequestPtr &req, ThreadContext *tc, bool write) const
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{
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//For now, always assume the address is already physical.
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//Also assume that there are 40 bits of physical address space.
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req->setPaddr(req->getVaddr() & ((1ULL << 40) - 1));
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return NoFault;
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}
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};
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}
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#endif // __ARCH_SPARC_TLB_HH__
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