gem5/tests/configs/simple-atomic.py
Steve Reinhardt 4e3164617a Add caches in, fix cpu.mem param
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extra : convert_revision : 486283d83786807c72bb4601e4b9613b55d8802c
2006-08-18 00:16:23 -04:00

39 lines
1.8 KiB
Python

# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
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# met: redistributions of source code must retain the above copyright
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# redistributions in binary form must reproduce the above copyright
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# neither the name of the copyright holders nor the names of its
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# Authors: Steve Reinhardt
import m5
from m5.objects import *
system = System(cpu = AtomicSimpleCPU(),
physmem = PhysicalMemory(),
membus = Bus())
system.physmem.port = system.membus.port
system.cpu.connectMemPorts(system.membus)
system.cpu.mem = system.physmem
root = Root(system = system)