bd367d4825
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
src/arch/sparc/arguments.hh:
move Copy* to vport since it's generic for all the ISAs
src/arch/sparc/isa_traits.hh:
the Solaris kernel sets up a virtual-> real mapping for all memory starting at SegKPMBase
src/arch/sparc/pagetable.hh:
add a class for getting bits out of the TteTag
src/arch/sparc/remote_gdb.cc:
add 32bit support kinda.... If its 32 bit
src/arch/sparc/remote_gdb.hh:
Add 32bit register offsets too.
src/arch/sparc/tlb.cc:
cleanup generation of tsb pointers
src/arch/sparc/tlb.hh:
add function to return tsb pointers for an address
make lookup public so vtophys can use it
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
write vtophys for sparc
src/base/bitfield.hh:
return a mask of bits first->last
src/mem/vport.cc:
src/mem/vport.hh:
move Copy* here since it's ISA generic
--HG--
extra : convert_revision : c42c331e396c0d51a2789029d8e232fe66995d0f
78 lines
2.6 KiB
C++
78 lines
2.6 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#ifndef __ARCH_ALPHA_REMOTE_GDB_HH__
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#define __ARCH_ALPHA_REMOTE_GDB_HH__
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#include <map>
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#include "arch/types.hh"
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#include "base/remote_gdb.hh"
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#include "cpu/pc_event.hh"
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#include "base/pollevent.hh"
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class System;
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class ThreadContext;
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class PhysicalMemory;
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namespace SparcISA
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{
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class RemoteGDB : public BaseRemoteGDB
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{
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protected:
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enum RegisterConstants
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{
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RegG0 = 0, RegO0 = 8, RegL0 = 16, RegI0 = 24,
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RegF0 = 32,
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RegPc = 64, RegNpc, RegState, RegFsr, RegFprs, RegY,
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/*RegState contains data in same format as tstate */
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Reg32Y = 64, Reg32Psr = 65, Reg32Tbr = 66, Reg32Pc = 67,
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Reg32Npc = 68, Reg32Fsr = 69, Reg32Csr = 70,
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NumGDBRegs = RegY
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};
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public:
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RemoteGDB(System *system, ThreadContext *context);
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bool acc(Addr addr, size_t len);
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protected:
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void getregs();
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void setregs();
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void clearSingleStep();
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void setSingleStep();
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Addr nextBkpt;
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};
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}
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#endif /* __ARCH_ALPHA_REMOTE_GDB_H__ */
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