gem5/src/sim/sim_object.hh
Kevin Lim f64c175f9a Add in support for quiescing the system, taking checkpoints, restoring from checkpoints, changing memory modes, and switching CPUs.
Key new functions that can be called on the m5 object at the python interpreter:
doQuiesce(root) - A helper function that quiesces the object passed in and all of its children.
resume(root) - Another helper function that tells the object and all of its children that the quiesce is over.
checkpoint(root) - Takes a checkpoint of the system.  Checkpoint directory must be set before hand.
setCheckpointDir(name) - Sets the checkpoint directory.
restoreCheckpoint(root) - Restores the values from the checkpoint located in the checkpoint directory.
changeToAtomic(system) - Changes the system and all of its children to atomic memory mode.
changeToTiming(system) - Changes the system and all of its children to timing memory mode.
switchCpus(list) - Takes in a list of tuples, where each tuple is a pair of (old CPU, new CPU).  Quiesces the old CPUs, and then switches over to the new CPUs.

src/SConscript:
    Remove serializer, replaced by python code.
src/python/m5/__init__.py:
    Updates to support quiescing, checkpointing, changing memory modes, and switching CPUs.
src/python/m5/config.py:
    Several functions defined on the SimObject for quiescing, changing timing modes, and switching CPUs
src/sim/main.cc:
    Add some extra functions that are exported to python through SWIG.
src/sim/serialize.cc:
    Change serialization around a bit.  Now it is controlled through Python, so there's no need for SerializeEvents or SerializeParams.

    Also add in a new unserializeAll() function that loads a checkpoint and handles unserializing all objects.
src/sim/serialize.hh:
    Add unserializeAll function and a setCheckpointName function.
src/sim/sim_events.cc:
    Add process() function for CountedQuiesceEvent, which calls exitSimLoop() once its counter reaches 0.
src/sim/sim_events.hh:
    Add in a CountedQuiesceEvent, which is used when the system is preparing to quiesce.  Any objects that can't be quiesced immediately are given a pointer to a CountedQuiesceEvent.  The event has its counter set via Python, and as objects finish quiescing they call process() on the event.  Eventually the event causes the simulation to stop once all objects have quiesced.
src/sim/sim_object.cc:
    Add a few functions for quiescing, checkpointing, and changing memory modes.
src/sim/sim_object.hh:
    Add a state variable to all SimObjects that tracks both the timing mode of the object and the quiesce state of the object.  Currently this isn't serialized, and I'm not sure it needs to be so long as the timing mode starts up the same after a checkpoint.

--HG--
extra : convert_revision : a8c738d3911c68d5a7caf7de24d732dcc62cfb61
2006-06-29 19:40:12 -04:00

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4.1 KiB
C++

/*
* Copyright (c) 2001-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Steve Reinhardt
* Nathan Binkert
*/
/* @file
* User Console Definitions
*/
#ifndef __SIM_OBJECT_HH__
#define __SIM_OBJECT_HH__
#include <map>
#include <list>
#include <vector>
#include <iostream>
#include "sim/serialize.hh"
#include "sim/startup.hh"
class BaseCPU;
class Event;
/*
* Abstract superclass for simulation objects. Represents things that
* correspond to physical components and can be specified via the
* config file (CPUs, caches, etc.).
*/
class SimObject : public Serializable, protected StartupCallback
{
public:
struct Params {
std::string name;
};
enum State {
Atomic,
Timing,
Quiescing,
QuiescedAtomic,
QuiescedTiming
};
protected:
Params *_params;
State state;
void changeState(State new_state) { state = new_state; }
public:
const Params *params() const { return _params; }
State getState() { return state; }
private:
typedef std::vector<SimObject *> SimObjectList;
// list of all instantiated simulation objects
static SimObjectList simObjectList;
public:
SimObject(Params *_params);
SimObject(const std::string &_name);
virtual ~SimObject() {}
virtual const std::string name() const { return params()->name; }
// initialization pass of all objects.
// Gets invoked after construction, before unserialize.
virtual void init();
virtual void connect();
static void initAll();
static void connectAll();
// register statistics for this object
virtual void regStats();
virtual void regFormulas();
virtual void resetStats();
// static: call reg_stats on all SimObjects
static void regAllStats();
// static: call resetStats on all SimObjects
static void resetAllStats();
// static: call nameOut() & serialize() on all SimObjects
static void serializeAll(std::ostream &);
static void unserializeAll(Checkpoint *cp);
// Methods to drain objects in order to take checkpoints
// Or switch from timing -> atomic memory model
// Quiesce returns true if the SimObject cannot quiesce immediately.
virtual bool quiesce(Event *quiesce_event);
virtual void resume();
virtual void setMemoryMode(State new_mode);
virtual void switchOut();
virtual void takeOverFrom(BaseCPU *cpu);
#ifdef DEBUG
public:
bool doDebugBreak;
static void debugObjectBreak(const std::string &objs);
#endif
public:
bool doRecordEvent;
void recordEvent(const std::string &stat);
};
#endif // __SIM_OBJECT_HH__