395 lines
13 KiB
C++
395 lines
13 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ron Dreslinski
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* Ali Saidi
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*/
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/**
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* @file
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* Declaration of a bus object.
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*/
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#ifndef __MEM_BUS_HH__
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#define __MEM_BUS_HH__
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#include <string>
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#include <set>
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#include <list>
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#include "base/hashmap.hh"
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#include "base/range.hh"
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#include "base/range_map.hh"
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#include "base/types.hh"
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#include "mem/mem_object.hh"
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#include "mem/packet.hh"
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#include "mem/port.hh"
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#include "mem/request.hh"
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#include "params/Bus.hh"
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#include "sim/eventq.hh"
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class Bus : public MemObject
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{
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/** Declaration of the buses port type, one will be instantiated for each
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of the interfaces connecting to the bus. */
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class BusPort : public Port
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{
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bool _onRetryList;
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/** A pointer to the bus to which this port belongs. */
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Bus *bus;
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/** A id to keep track of the intercafe ID this port is connected to. */
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int id;
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public:
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/** Constructor for the BusPort.*/
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BusPort(const std::string &_name, Bus *_bus, int _id)
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: Port(_name, _bus), _onRetryList(false), bus(_bus), id(_id)
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{ }
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bool onRetryList()
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{ return _onRetryList; }
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void onRetryList(bool newVal)
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{ _onRetryList = newVal; }
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int getId() { return id; }
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protected:
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/** When reciving a timing request from the peer port (at id),
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pass it to the bus. */
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virtual bool recvTiming(PacketPtr pkt)
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{ pkt->setSrc(id); return bus->recvTiming(pkt); }
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/** When reciving a Atomic requestfrom the peer port (at id),
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pass it to the bus. */
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virtual Tick recvAtomic(PacketPtr pkt)
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{ pkt->setSrc(id); return bus->recvAtomic(pkt); }
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/** When reciving a Functional requestfrom the peer port (at id),
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pass it to the bus. */
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virtual void recvFunctional(PacketPtr pkt)
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{ pkt->setSrc(id); bus->recvFunctional(pkt); }
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/** When reciving a status changefrom the peer port (at id),
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pass it to the bus. */
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virtual void recvStatusChange(Status status)
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{ bus->recvStatusChange(status, id); }
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/** When reciving a retry from the peer port (at id),
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pass it to the bus. */
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virtual void recvRetry()
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{ bus->recvRetry(id); }
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// This should return all the 'owned' addresses that are
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// downstream from this bus, yes? That is, the union of all
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// the 'owned' address ranges of all the other interfaces on
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// this bus...
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virtual void getDeviceAddressRanges(AddrRangeList &resp,
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bool &snoop)
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{ bus->addressRanges(resp, snoop, id); }
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// Ask the bus to ask everyone on the bus what their block size is and
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// take the max of it. This might need to be changed a bit if we ever
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// support multiple block sizes.
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virtual unsigned deviceBlockSize() const
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{ return bus->findBlockSize(id); }
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};
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class BusFreeEvent : public Event
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{
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Bus * bus;
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public:
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BusFreeEvent(Bus * _bus);
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void process();
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const char *description() const;
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};
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/** a globally unique id for this bus. */
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int busId;
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/** the clock speed for the bus */
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int clock;
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/** cycles of overhead per transaction */
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int headerCycles;
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/** the width of the bus in bytes */
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int width;
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/** the next tick at which the bus will be idle */
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Tick tickNextIdle;
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Event * drainEvent;
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static const int defaultId = -3; //Make it unique from Broadcast
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typedef range_map<Addr,int>::iterator PortIter;
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range_map<Addr, int> portMap;
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AddrRangeList defaultRange;
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typedef std::vector<BusPort*>::iterator SnoopIter;
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std::vector<BusPort*> snoopPorts;
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/** Function called by the port when the bus is recieving a Timing
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transaction.*/
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bool recvTiming(PacketPtr pkt);
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/** Function called by the port when the bus is recieving a Atomic
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transaction.*/
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Tick recvAtomic(PacketPtr pkt);
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/** Function called by the port when the bus is recieving a Functional
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transaction.*/
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void recvFunctional(PacketPtr pkt);
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/** Timing function called by port when it is once again able to process
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* requests. */
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void recvRetry(int id);
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/** Function called by the port when the bus is recieving a status change.*/
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void recvStatusChange(Port::Status status, int id);
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/** Find which port connected to this bus (if any) should be given a packet
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* with this address.
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* @param addr Address to find port for.
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* @return id of port that the packet should be sent out of.
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*/
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int findPort(Addr addr);
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// Cache for the findPort function storing recently used ports from portMap
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struct PortCache {
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bool valid;
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int id;
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Addr start;
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Addr end;
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};
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PortCache portCache[3];
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// Checks the cache and returns the id of the port that has the requested
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// address within its range
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inline int checkPortCache(Addr addr) {
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if (portCache[0].valid && addr >= portCache[0].start &&
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addr < portCache[0].end) {
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return portCache[0].id;
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}
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if (portCache[1].valid && addr >= portCache[1].start &&
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addr < portCache[1].end) {
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return portCache[1].id;
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}
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if (portCache[2].valid && addr >= portCache[2].start &&
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addr < portCache[2].end) {
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return portCache[2].id;
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}
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return -1;
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}
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// Clears the earliest entry of the cache and inserts a new port entry
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inline void updatePortCache(short id, Addr start, Addr end) {
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portCache[2].valid = portCache[1].valid;
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portCache[2].id = portCache[1].id;
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portCache[2].start = portCache[1].start;
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portCache[2].end = portCache[1].end;
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portCache[1].valid = portCache[0].valid;
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portCache[1].id = portCache[0].id;
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portCache[1].start = portCache[0].start;
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portCache[1].end = portCache[0].end;
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portCache[0].valid = true;
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portCache[0].id = id;
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portCache[0].start = start;
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portCache[0].end = end;
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}
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// Clears the cache. Needs to be called in constructor.
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inline void clearPortCache() {
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portCache[2].valid = false;
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portCache[1].valid = false;
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portCache[0].valid = false;
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}
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/** Process address range request.
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* @param resp addresses that we can respond to
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* @param snoop addresses that we would like to snoop
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* @param id ide of the busport that made the request.
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*/
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void addressRanges(AddrRangeList &resp, bool &snoop, int id);
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/** Calculate the timing parameters for the packet. Updates the
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* firstWordTime and finishTime fields of the packet object.
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* Returns the tick at which the packet header is completed (which
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* will be all that is sent if the target rejects the packet).
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*/
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Tick calcPacketTiming(PacketPtr pkt);
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/** Occupy the bus until until */
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void occupyBus(Tick until);
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/** Ask everyone on the bus what their size is
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* @param id id of the busport that made the request
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* @return the max of all the sizes
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*/
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unsigned findBlockSize(int id);
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BusFreeEvent busIdle;
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bool inRetry;
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std::set<int> inRecvStatusChange;
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/** max number of bus ids we've handed out so far */
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short maxId;
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/** An array of pointers to the peer port interfaces
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connected to this bus.*/
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m5::hash_map<short,BusPort*> interfaces;
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/** An array of pointers to ports that retry should be called on because the
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* original send failed for whatever reason.*/
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std::list<BusPort*> retryList;
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void addToRetryList(BusPort * port)
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{
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if (!inRetry) {
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// The device wasn't retrying a packet, or wasn't at an appropriate
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// time.
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assert(!port->onRetryList());
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port->onRetryList(true);
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retryList.push_back(port);
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} else {
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if (port->onRetryList()) {
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// The device was retrying a packet. It didn't work, so we'll leave
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// it at the head of the retry list.
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assert(port == retryList.front());
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inRetry = false;
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}
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else {
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port->onRetryList(true);
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retryList.push_back(port);
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}
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}
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}
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/** Port that handles requests that don't match any of the interfaces.*/
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BusPort *defaultPort;
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BusPort *funcPort;
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int funcPortId;
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/** Has the user specified their own default responder? */
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bool responderSet;
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unsigned defaultBlockSize;
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unsigned cachedBlockSize;
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bool cachedBlockSizeValid;
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// Cache for the peer port interfaces
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struct BusCache {
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bool valid;
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short id;
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BusPort *port;
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};
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BusCache busCache[3];
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// Checks the peer port interfaces cache for the port id and returns
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// a pointer to the matching port
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inline BusPort* checkBusCache(short id) {
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if (busCache[0].valid && id == busCache[0].id) {
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return busCache[0].port;
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}
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if (busCache[1].valid && id == busCache[1].id) {
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return busCache[1].port;
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}
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if (busCache[2].valid && id == busCache[2].id) {
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return busCache[2].port;
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}
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return NULL;
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}
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// Replaces the earliest entry in the cache with a new entry
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inline void updateBusCache(short id, BusPort *port) {
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busCache[2].valid = busCache[1].valid;
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busCache[2].id = busCache[1].id;
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busCache[2].port = busCache[1].port;
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busCache[1].valid = busCache[0].valid;
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busCache[1].id = busCache[0].id;
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busCache[1].port = busCache[0].port;
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busCache[0].valid = true;
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busCache[0].id = id;
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busCache[0].port = port;
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}
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// Invalidates the cache. Needs to be called in constructor.
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inline void clearBusCache() {
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busCache[2].valid = false;
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busCache[1].valid = false;
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busCache[0].valid = false;
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}
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public:
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/** A function used to return the port associated with this bus object. */
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virtual Port *getPort(const std::string &if_name, int idx = -1);
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virtual void deletePortRefs(Port *p);
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virtual void init();
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virtual void startup();
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unsigned int drain(Event *de);
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Bus(const BusParams *p)
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: MemObject(p), busId(p->bus_id), clock(p->clock),
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headerCycles(p->header_cycles), width(p->width), tickNextIdle(0),
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drainEvent(NULL), busIdle(this), inRetry(false), maxId(0),
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defaultPort(NULL), funcPort(NULL), funcPortId(-4),
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responderSet(p->responder_set), defaultBlockSize(p->block_size),
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cachedBlockSize(0), cachedBlockSizeValid(false)
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{
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//width, clock period, and header cycles must be positive
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if (width <= 0)
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fatal("Bus width must be positive\n");
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if (clock <= 0)
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fatal("Bus clock period must be positive\n");
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if (headerCycles <= 0)
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fatal("Number of header cycles must be positive\n");
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clearBusCache();
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clearPortCache();
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}
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};
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#endif //__MEM_BUS_HH__
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