ed08dc31ba
A few regressions were still considered long, but finished well within the 180 seconds. They are only a handful (mostly mcf in atomic). --HG-- rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/config.ini rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simerr rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simout rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/stats.txt rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/system.terminal rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/chair.cook.ppm => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/chair.cook.ppm rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/config.ini rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/mcf.out => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/mcf.out rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simerr rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simout rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/chair.cook.ppm => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/chair.cook.ppm rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/config.ini rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/mcf.out => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/mcf.out rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/simerr rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/simout rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/stats.txt rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/mcf.out => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/mcf.out rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/simerr rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/simout => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/simout rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/config.ini rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/mcf.out => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/mcf.out rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simerr => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/simerr rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simout => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/simout rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/stats.txt => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/se/10.mcf/test.py => tests/quick/se/10.mcf/test.py rename : tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/30.eon/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/30.eon/ref/alpha/tru64/simple-atomic/simout rename : tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/30.eon/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/se/30.eon/test.py => tests/quick/se/30.eon/test.py
69 lines
3.1 KiB
Text
Executable file
69 lines
3.1 KiB
Text
Executable file
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
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warn: Sockets disabled, not accepting vnc client connections
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warn: Sockets disabled, not accepting terminal connections
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warn: Sockets disabled, not accepting gdb connections
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warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
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warn: Not doing anything for miscreg ACTLR
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warn: Not doing anything for write of miscreg ACTLR
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warn: The clidr register always reports 0 caches.
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warn: clidr LoUIS field of 0b001 to match current ARM implementations.
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warn: The csselr register isn't implemented.
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warn: instruction 'mcr dccmvau' unimplemented
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warn: instruction 'mcr icimvau' unimplemented
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warn: instruction 'mcr bpiallis' unimplemented
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warn: instruction 'mcr icialluis' unimplemented
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warn: instruction 'mcr dccimvac' unimplemented
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warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
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warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
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warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
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warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
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warn: Returning zero for read from miscreg pmcr
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warn: Ignoring write to miscreg pmcntenclr
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warn: Ignoring write to miscreg pmintenclr
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warn: Ignoring write to miscreg pmovsr
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warn: Ignoring write to miscreg pmcr
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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warn: User mode does not have SPSR
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