gem5/src/arch
Nathan Binkert 5711282f87 Fix a bunch of bugs I introduced when I changed the flags stuff for packets.
I did some of the flags and assertions wrong. Thanks to Brad Beckmann
for pointing this out.  I should have run the opt regressions instead
of the fast. I also screwed up some of the logical functions in the Flags
class.
2008-11-14 04:55:30 -08:00
..
alpha Fix a bunch of bugs I introduced when I changed the flags stuff for packets. 2008-11-14 04:55:30 -08:00
mips Fix a bunch of bugs I introduced when I changed the flags stuff for packets. 2008-11-14 04:55:30 -08:00
sparc mem: update stuff for changes to Packet and Request 2008-11-10 11:51:17 -08:00
x86 mem: update stuff for changes to Packet and Request 2008-11-10 11:51:17 -08:00
isa_parser.py style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
isa_specific.hh style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
micro_asm.py Microcode: Fix a silent typo error in the microcode assembler. 2008-10-09 00:07:38 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript CPU: Create a microcode ROM object in the CPU which is defined by the ISA. 2008-10-12 15:59:21 -07:00