gem5/configs/learning_gem5/part1
Sophiane Senni ce2722cdd9 mem: Split the hit_latency into tag_latency and data_latency
If the cache access mode is parallel, i.e. "sequential_access" parameter
is set to "False", tags and data are accessed in parallel. Therefore,
the hit_latency is the maximum latency between tag_latency and
data_latency. On the other hand, if the cache access mode is
sequential, i.e. "sequential_access" parameter is set to "True",
tags and data are accessed sequentially. Therefore, the hit_latency
is the sum of tag_latency plus data_latency.

Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2016-11-30 17:10:27 -05:00
..
caches.py mem: Split the hit_latency into tag_latency and data_latency 2016-11-30 17:10:27 -05:00
simple.py config: Fix 'learning gem5' configs after SMT push 2015-10-01 04:07:15 -04:00
two_level.py config: Make configs/common a Python package 2016-10-14 10:37:38 -04:00