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cache
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base: Declare a type for context IDs
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2015-08-07 09:59:13 +01:00 |
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probes
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mem: Fixup incorrect include guards
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2015-08-05 10:12:12 +01:00 |
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protocol
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ruby: drop the [] notation for lookup function.
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2015-08-14 19:28:43 -05:00 |
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ruby
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ruby: adds set and way indices to AbstractCacheEntry
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2015-08-14 19:28:43 -05:00 |
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slicc
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ruby: eliminate type uint64 and int64
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2015-08-14 19:28:43 -05:00 |
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abstract_mem.cc
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mem: Add clean evicts to improve snoop filter tracking
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2015-07-03 10:14:37 -04:00 |
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abstract_mem.hh
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base: Declare a type for context IDs
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2015-08-07 09:59:13 +01:00 |
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AbstractMemory.py
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mem: Change AbstractMemory defaults to match the common case
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2013-08-19 03:52:33 -04:00 |
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addr_mapper.cc
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mem: addr_mapper: restore old address if request not sent
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2015-05-30 13:45:17 +02:00 |
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addr_mapper.hh
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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AddrMapper.py
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sim: Include object header files in SWIG interfaces
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2012-11-02 11:32:01 -05:00 |
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bridge.cc
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mem: Fix (ab)use of emplace to avoid temporary object creation
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2015-07-13 08:46:28 -04:00 |
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bridge.hh
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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Bridge.py
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mem: Tidy up the bridge with const and additional checks
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2013-06-27 05:49:49 -04:00 |
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coherent_xbar.cc
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sim: Decouple draining from the SimObject hierarchy
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2015-07-07 09:51:05 +01:00 |
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coherent_xbar.hh
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sim: Decouple draining from the SimObject hierarchy
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2015-07-07 09:51:05 +01:00 |
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comm_monitor.cc
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mem: Move trace functionality from the CommMonitor to a probe
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2015-08-04 10:29:13 +01:00 |
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comm_monitor.hh
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mem: Move trace functionality from the CommMonitor to a probe
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2015-08-04 10:29:13 +01:00 |
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CommMonitor.py
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mem: Move trace functionality from the CommMonitor to a probe
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2015-08-04 10:29:13 +01:00 |
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dram_ctrl.cc
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sim: Refactor and simplify the drain API
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2015-07-07 09:51:05 +01:00 |
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dram_ctrl.hh
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sim: Refactor and simplify the drain API
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2015-07-07 09:51:05 +01:00 |
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DRAMCtrl.py
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mem: Increase the default buffer sizes for the DDR4 controller
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2015-07-03 10:14:48 -04:00 |
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drampower.cc
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mem: Add a GDDR5 DRAM config
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2014-12-02 06:07:32 -05:00 |
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drampower.hh
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mem: Add DRAMPower wrapping class
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2014-07-29 17:29:36 +01:00 |
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dramsim2.cc
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mem: Updated DRAMSim2 wrapper to new drain API
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2015-07-13 08:46:16 -04:00 |
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dramsim2.hh
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sim: Refactor and simplify the drain API
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2015-07-07 09:51:05 +01:00 |
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DRAMSim2.py
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mem: Add a wrapped DRAMSim2 memory controller
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2014-02-18 05:50:53 -05:00 |
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dramsim2_wrapper.cc
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mem: Add a wrapped DRAMSim2 memory controller
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2014-02-18 05:50:53 -05:00 |
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dramsim2_wrapper.hh
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mem: Add a wrapped DRAMSim2 memory controller
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2014-02-18 05:50:53 -05:00 |
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external_master.cc
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mem: Add ExternalMaster and ExternalSlave ports
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2014-10-16 05:49:56 -04:00 |
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external_master.hh
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mem: Add ExternalMaster and ExternalSlave ports
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2014-10-16 05:49:56 -04:00 |
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external_slave.cc
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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external_slave.hh
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mem: Add ExternalMaster and ExternalSlave ports
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2014-10-16 05:49:56 -04:00 |
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ExternalMaster.py
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mem: Add ExternalMaster and ExternalSlave ports
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2014-10-16 05:49:56 -04:00 |
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ExternalSlave.py
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mem: Add ExternalMaster and ExternalSlave ports
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2014-10-16 05:49:56 -04:00 |
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fs_translating_port_proxy.cc
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mem: Use const pointers for port proxy write functions
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2014-12-02 06:07:38 -05:00 |
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fs_translating_port_proxy.hh
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mem: Use const pointers for port proxy write functions
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2014-12-02 06:07:38 -05:00 |
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mem_checker.cc
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mem: Fix initial value problem with MemChecker
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2015-02-16 03:34:47 -05:00 |
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mem_checker.hh
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mem: Add MemChecker and MemCheckerMonitor
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2014-12-23 09:31:17 -05:00 |
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mem_checker_monitor.cc
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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mem_checker_monitor.hh
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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mem_object.cc
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Port: Add protocol-agnostic ports in the port hierarchy
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2012-10-15 08:12:35 -04:00 |
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mem_object.hh
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Port: Add protocol-agnostic ports in the port hierarchy
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2012-10-15 08:12:35 -04:00 |
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MemChecker.py
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mem: Add MemChecker and MemCheckerMonitor
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2014-12-23 09:31:17 -05:00 |
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MemObject.py
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sim: Include object header files in SWIG interfaces
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2012-11-02 11:32:01 -05:00 |
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mport.cc
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MEM: Separate snoops and normal memory requests/responses
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2012-04-14 05:45:07 -04:00 |
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mport.hh
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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multi_level_page_table.cc
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mem: adding a multi-level page table class
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2014-04-01 12:18:12 -05:00 |
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multi_level_page_table.hh
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sim: Refactor the serialization base class
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2015-07-07 09:51:03 +01:00 |
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multi_level_page_table_impl.hh
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sim: Refactor the serialization base class
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2015-07-07 09:51:03 +01:00 |
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noncoherent_xbar.cc
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sim: Decouple draining from the SimObject hierarchy
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2015-07-07 09:51:05 +01:00 |
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noncoherent_xbar.hh
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sim: Decouple draining from the SimObject hierarchy
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2015-07-07 09:51:05 +01:00 |
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packet.cc
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mem: Remove extraneous acquire/release flags and attributes
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2015-08-07 04:55:38 -04:00 |
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packet.hh
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mem: Cleanup packet accessor methods
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2015-08-07 09:59:28 +01:00 |
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packet_access.hh
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mem: Cleanup packet accessor methods
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2015-08-07 09:59:28 +01:00 |
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packet_queue.cc
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mem: Fix (ab)use of emplace to avoid temporary object creation
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2015-07-13 08:46:28 -04:00 |
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packet_queue.hh
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sim: Refactor and simplify the drain API
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2015-07-07 09:51:05 +01:00 |
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page_table.cc
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sim: Refactor the serialization base class
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2015-07-07 09:51:03 +01:00 |
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page_table.hh
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sim: Refactor the serialization base class
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2015-07-07 09:51:03 +01:00 |
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physical.cc
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base: Declare a type for context IDs
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2015-08-07 09:59:13 +01:00 |
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physical.hh
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sim: Refactor the serialization base class
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2015-07-07 09:51:03 +01:00 |
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port.cc
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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port.hh
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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port_proxy.cc
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mem: Clean up Request initialisation
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2015-01-22 05:00:53 -05:00 |
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port_proxy.hh
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mem: Use const pointers for port proxy write functions
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2014-12-02 06:07:38 -05:00 |
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qport.hh
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sim: Decouple draining from the SimObject hierarchy
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2015-07-07 09:51:05 +01:00 |
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request.hh
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base: Declare a type for context IDs
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2015-08-07 09:59:13 +01:00 |
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SConscript
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mem: Move trace functionality from the CommMonitor to a probe
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2015-08-04 10:29:13 +01:00 |
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se_translating_port_proxy.cc
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mem: Use const pointers for port proxy write functions
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2014-12-02 06:07:38 -05:00 |
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se_translating_port_proxy.hh
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mem: Use const pointers for port proxy write functions
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2014-12-02 06:07:38 -05:00 |
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simple_mem.cc
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mem: Fix (ab)use of emplace to avoid temporary object creation
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2015-07-13 08:46:28 -04:00 |
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simple_mem.hh
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sim: Refactor and simplify the drain API
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2015-07-07 09:51:05 +01:00 |
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SimpleMemory.py
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mem: Add an internal packet queue in SimpleMemory
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2013-08-19 03:52:25 -04:00 |
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snoop_filter.cc
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mem: Add clean evicts to improve snoop filter tracking
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2015-07-03 10:14:37 -04:00 |
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snoop_filter.hh
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mem: Delay responses in the crossbar before forwarding
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2015-07-03 10:14:44 -04:00 |
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stack_dist_calc.cc
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mem: Redesign the stack distance calculator as a probe
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2015-08-04 10:29:13 +01:00 |
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stack_dist_calc.hh
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mem: Redesign the stack distance calculator as a probe
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2015-08-04 10:29:13 +01:00 |
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tport.cc
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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tport.hh
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mem: Split port retry for all different packet classes
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2015-03-02 04:00:35 -05:00 |
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xbar.cc
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sim: Refactor and simplify the drain API
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2015-07-07 09:51:05 +01:00 |
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xbar.hh
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sim: Refactor and simplify the drain API
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2015-07-07 09:51:05 +01:00 |
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XBar.py
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mem: Move crossbar default latencies to subclasses
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2015-03-02 04:00:47 -05:00 |
