Andreas Sandberg 3db3f83a5e arch: Make the ISA class inherit from SimObject ... The ISA class on stores the contents of ID registers on many architectures. In order to make reset values of such registers configurable, we make the class inherit from SimObject, which allows us to use the normal generated parameter headers. This patch introduces a Python helper method, BaseCPU.createThreads(), which creates a set of ISAs for each of the threads in an SMT system. Although it is currently only needed when creating multi-threaded CPUs, it should always be called before instantiating the system as this is an obvious place to configure ID registers identifying a thread/CPU.		2013-01-07 13:05:35 -05:00
..
configs	tests: Always specify memory mode in every test system.	2013-01-07 13:05:33 -05:00
long	regressions: stats update due to decoder changes	2013-01-04 19:00:48 -06:00
quick	regressions: stats update due to decoder changes	2013-01-04 19:00:48 -06:00
test-progs/hello	X86: Add a 32 bit hello world test binary.	2012-05-27 19:01:09 -07:00
diff-out	tests: fix diff-out script for op/inst stat changes.	2012-02-12 18:35:59 -06:00
halt.sh	Rearrange the FS configs to be more shared. Also check in the full-system tests. Reference stats coming soon.	2006-07-21 15:56:35 -04:00
run.py	arch: Make the ISA class inherit from SimObject	2013-01-07 13:05:35 -05:00
SConscript	SimpleDRAM: A basic SimpleDRAM regression	2012-09-21 11:48:14 -04:00