b8a2d1e5c7
fixing things, partly by ignoring CPU models that don't currently compile. SConscript: Split sources for fast, simple, and o3 CPU models into separate source lists. For now none of these are included in the base source list, so you won't get any CPU models at all... but we still can't compile the other stuff so it's not an issue. Also get rid of obsolete encumbered/mem file. base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/object_file.hh: cpu/exec_context.cc: sim/process.cc: sim/system.cc: sim/system.hh: FunctionalMemory -> Memory cpu/pc_event.hh: Get rid of unused badpc. cpu/simple/cpu.cc: cpu/simple/cpu.hh: Move Port functions into .cc file. mem/port.hh: Make recvAddressRangesQuery panic by default instead of being abstract... do CPUs need to implement this? mem/request.hh: Add prefetch flags. sim/syscall_emul.hh: Start to fix... --HG-- extra : convert_revision : ece53b3855f20916caaa381598ac37e8c7adfba7
485 lines
14 KiB
C++
485 lines
14 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "base/loader/object_file.hh"
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#include "base/loader/symtab.hh"
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#include "cpu/exec_context.hh"
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#include "mem/memory.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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#include "base/trace.hh"
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#if FULL_SYSTEM
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#include "base/remote_gdb.hh"
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#include "kern/kernel_stats.hh"
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#include "mem/functional/memory_control.hh"
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#include "targetarch/vtophys.hh"
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#endif
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using namespace std;
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vector<System *> System::systemList;
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int System::numSystemsRunning = 0;
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System::System(Params *p)
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: SimObject(p->name), physmem(p->physmem), numcpus(0),
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#if FULL_SYSTEM
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memctrl(p->memctrl), init_param(p->init_param),
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#else
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page_ptr(0),
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#endif
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params(p)
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{
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// add self to global system list
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systemList.push_back(this);
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#if FULL_SYSTEM
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kernelSymtab = new SymbolTable;
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consoleSymtab = new SymbolTable;
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palSymtab = new SymbolTable;
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debugSymbolTable = new SymbolTable;
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/**
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* Load the kernel, pal, and console code into memory
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*/
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// Load kernel code
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kernel = createObjectFile(params->kernel_path);
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if (kernel == NULL)
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fatal("Could not load kernel file %s", params->kernel_path);
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// Load Console Code
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console = createObjectFile(params->console_path);
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if (console == NULL)
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fatal("Could not load console file %s", params->console_path);
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// Load pal file
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pal = createObjectFile(params->palcode);
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if (pal == NULL)
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fatal("Could not load PALcode file %s", params->palcode);
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// Load program sections into memory
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pal->loadSections(physmem, true);
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console->loadSections(physmem, true);
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kernel->loadSections(physmem, true);
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// setup entry points
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kernelStart = kernel->textBase();
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kernelEnd = kernel->bssBase() + kernel->bssSize();
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kernelEntry = kernel->entryPoint();
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// load symbols
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if (!kernel->loadGlobalSymbols(kernelSymtab))
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panic("could not load kernel symbols\n");
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if (!kernel->loadLocalSymbols(kernelSymtab))
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panic("could not load kernel local symbols\n");
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if (!console->loadGlobalSymbols(consoleSymtab))
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panic("could not load console symbols\n");
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if (!pal->loadGlobalSymbols(palSymtab))
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panic("could not load pal symbols\n");
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if (!pal->loadLocalSymbols(palSymtab))
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panic("could not load pal symbols\n");
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if (!kernel->loadGlobalSymbols(debugSymbolTable))
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panic("could not load kernel symbols\n");
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if (!kernel->loadLocalSymbols(debugSymbolTable))
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panic("could not load kernel local symbols\n");
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if (!console->loadGlobalSymbols(debugSymbolTable))
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panic("could not load console symbols\n");
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if (!pal->loadGlobalSymbols(debugSymbolTable))
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panic("could not load pal symbols\n");
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if (!pal->loadLocalSymbols(debugSymbolTable))
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panic("could not load pal symbols\n");
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DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
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DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
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DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
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DPRINTF(Loader, "Kernel loaded...\n");
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Addr addr = 0;
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#ifdef DEBUG
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consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic");
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#endif
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/**
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* Copy the osflags (kernel arguments) into the consoles
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* memory. (Presently Linux does not use the console service
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* routine to get these command line arguments, but Tru64 and
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* others do.)
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*/
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if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
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Addr paddr = vtophys(physmem, addr);
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char *osflags = (char *)physmem->dma_addr(paddr, sizeof(uint32_t));
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if (osflags)
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strcpy(osflags, params->boot_osflags.c_str());
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}
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/**
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* Set the hardware reset parameter block system type and revision
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* information to Tsunami.
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*/
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if (consoleSymtab->findAddress("m5_rpb", addr)) {
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Addr paddr = vtophys(physmem, addr);
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char *hwrpb = (char *)physmem->dma_addr(paddr, sizeof(uint64_t));
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if (!hwrpb)
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panic("could not translate hwrpb addr\n");
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*(uint64_t*)(hwrpb+0x50) = htog(params->system_type);
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*(uint64_t*)(hwrpb+0x58) = htog(params->system_rev);
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} else
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panic("could not find hwrpb\n");
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kernelBinning = new Kernel::Binning(this);
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#endif // FULL_SYSTEM
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// increment the number of running systms
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numSystemsRunning++;
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}
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System::~System()
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{
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#if FULL_SYSTEM
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delete kernelSymtab;
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delete consoleSymtab;
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delete kernel;
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delete console;
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delete pal;
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delete kernelBinning;
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#ifdef DEBUG
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delete consolePanicEvent;
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#endif
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#endif // FULL_SYSTEM
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}
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/**
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* This function fixes up addresses that are used to match PCs for
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* hooking simulator events on to target function executions.
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*
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* Alpha binaries may have multiple global offset table (GOT)
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* sections. A function that uses the GOT starts with a
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* two-instruction prolog which sets the global pointer (gp == r29) to
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* the appropriate GOT section. The proper gp value is calculated
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* based on the function address, which must be passed by the caller
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* in the procedure value register (pv aka t12 == r27). This sequence
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* looks like the following:
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*
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* opcode Ra Rb offset
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* ldah gp,X(pv) 09 29 27 X
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* lda gp,Y(gp) 08 29 29 Y
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*
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* for some constant offsets X and Y. The catch is that the linker
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* (or maybe even the compiler, I'm not sure) may recognize that the
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* caller and callee are using the same GOT section, making this
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* prolog redundant, and modify the call target to skip these
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* instructions. If we check for execution of the first instruction
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* of a function (the one the symbol points to) to detect when to skip
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* it, we'll miss all these modified calls. It might work to
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* unconditionally check for the third instruction, but not all
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* functions have this prolog, and there's some chance that those
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* first two instructions could have undesired consequences. So we do
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* the Right Thing and pattern-match the first two instructions of the
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* function to decide where to patch.
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*
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* Eventually this code should be moved into an ISA-specific file.
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*/
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Addr
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System::fixFuncEventAddr(Addr addr)
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{
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#if FULL_SYSTEM
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// mask for just the opcode, Ra, and Rb fields (not the offset)
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const uint32_t inst_mask = 0xffff0000;
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// ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27
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const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16);
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// lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
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const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
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// instruction size
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const int sz = sizeof(uint32_t);
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Addr paddr = vtophys(physmem, addr);
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uint32_t i1 = *(uint32_t *)physmem->dma_addr(paddr, sz);
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uint32_t i2 = *(uint32_t *)physmem->dma_addr(paddr+sz, sz);
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if ((i1 & inst_mask) == gp_ldah_pattern &&
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(i2 & inst_mask) == gp_lda_pattern) {
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Addr new_addr = addr + 2*sz;
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DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr);
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return new_addr;
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} else {
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return addr;
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}
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#else
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panic("System::fixFuncEventAddr needs to be rewritten "
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"to work with syscall emulation");
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#endif // FULL_SYSTEM}
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}
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#if FULL_SYSTEM
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void
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System::setAlphaAccess(Addr access)
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{
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Addr addr = 0;
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if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
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Addr paddr = vtophys(physmem, addr);
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uint64_t *m5AlphaAccess =
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(uint64_t *)physmem->dma_addr(paddr, sizeof(uint64_t));
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if (!m5AlphaAccess)
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panic("could not translate m5AlphaAccess addr\n");
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*m5AlphaAccess = htog(EV5::Phys2K0Seg(access));
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} else
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panic("could not find m5AlphaAccess\n");
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}
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bool
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System::breakpoint()
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{
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return remoteGDB[0]->trap(ALPHA_KENTRY_INT);
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}
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int rgdb_wait = -1;
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#endif // FULL_SYSTEM
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int
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System::registerExecContext(ExecContext *xc, int id)
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{
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if (id == -1) {
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for (id = 0; id < execContexts.size(); id++) {
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if (!execContexts[id])
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break;
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}
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}
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if (execContexts.size() <= id)
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execContexts.resize(id + 1);
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if (execContexts[id])
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panic("Cannot have two CPUs with the same id (%d)\n", id);
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execContexts[id] = xc;
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numcpus++;
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#if FULL_SYSTEM
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RemoteGDB *rgdb = new RemoteGDB(this, xc);
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GDBListener *gdbl = new GDBListener(rgdb, 7000 + id);
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gdbl->listen();
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/**
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* Uncommenting this line waits for a remote debugger to connect
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* to the simulator before continuing.
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*/
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if (rgdb_wait != -1 && rgdb_wait == id)
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gdbl->accept();
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if (remoteGDB.size() <= id) {
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remoteGDB.resize(id + 1);
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}
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remoteGDB[id] = rgdb;
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#endif // FULL_SYSTEM
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return id;
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}
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void
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System::startup()
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{
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if (!execContexts.empty()) {
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// activate with zero delay so that we start ticking right
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// away on cycle 0
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execContexts[0]->activate(0);
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}
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}
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void
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System::replaceExecContext(ExecContext *xc, int id)
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{
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if (id >= execContexts.size()) {
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panic("replaceExecContext: bad id, %d >= %d\n",
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id, execContexts.size());
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}
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execContexts[id] = xc;
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#if FULL_SYSTEM
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remoteGDB[id]->replaceExecContext(xc);
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#endif // FULL_SYSTEM
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}
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#if !FULL_SYSTEM
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Addr
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System::new_page()
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{
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Addr return_addr = page_ptr << LogVMPageSize;
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++page_ptr;
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return return_addr;
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}
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#endif
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void
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System::regStats()
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{
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#if FULL_SYSTEM
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kernelBinning->regStats(name() + ".kern");
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#endif // FULL_SYSTEM
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}
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void
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System::serialize(ostream &os)
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{
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#if FULL_SYSTEM
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kernelBinning->serialize(os);
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kernelSymtab->serialize("kernel_symtab", os);
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consoleSymtab->serialize("console_symtab", os);
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palSymtab->serialize("pal_symtab", os);
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#endif // FULL_SYSTEM
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}
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void
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System::unserialize(Checkpoint *cp, const string §ion)
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{
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#if FULL_SYSTEM
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kernelBinning->unserialize(cp, section);
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kernelSymtab->unserialize("kernel_symtab", cp, section);
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consoleSymtab->unserialize("console_symtab", cp, section);
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palSymtab->unserialize("pal_symtab", cp, section);
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#endif // FULL_SYSTEM
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}
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void
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System::printSystems()
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{
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vector<System *>::iterator i = systemList.begin();
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vector<System *>::iterator end = systemList.end();
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for (; i != end; ++i) {
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System *sys = *i;
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cerr << "System " << sys->name() << ": " << hex << sys << endl;
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}
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}
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extern "C"
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void
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printSystems()
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{
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System::printSystems();
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}
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(System)
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SimObjectParam<Memory *> physmem;
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#if FULL_SYSTEM
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Param<Tick> boot_cpu_frequency;
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SimObjectParam<MemoryController *> memctrl;
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Param<string> kernel;
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Param<string> console;
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Param<string> pal;
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Param<string> boot_osflags;
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Param<string> readfile;
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Param<unsigned int> init_param;
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Param<uint64_t> system_type;
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Param<uint64_t> system_rev;
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Param<bool> bin;
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VectorParam<string> binned_fns;
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Param<bool> bin_int;
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#endif // FULL_SYSTEM
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END_DECLARE_SIM_OBJECT_PARAMS(System)
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BEGIN_INIT_SIM_OBJECT_PARAMS(System)
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INIT_PARAM(physmem, "physical memory")
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#if FULL_SYSTEM
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,
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INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
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INIT_PARAM(memctrl, "memory controller"),
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INIT_PARAM(kernel, "file that contains the kernel code"),
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INIT_PARAM(console, "file that contains the console code"),
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INIT_PARAM(pal, "file that contains palcode"),
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INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot",
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"a"),
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INIT_PARAM_DFLT(readfile, "file to read startup script from", ""),
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INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0),
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INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34),
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INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10),
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INIT_PARAM_DFLT(bin, "is this system to be binned", false),
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INIT_PARAM(binned_fns, "functions to be broken down and binned"),
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INIT_PARAM_DFLT(bin_int, "is interrupt code binned seperately?", true)
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#endif // FULL_SYSTEM
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END_INIT_SIM_OBJECT_PARAMS(System)
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CREATE_SIM_OBJECT(System)
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{
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System::Params *p = new System::Params;
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p->name = getInstanceName();
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p->physmem = physmem;
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#if FULL_SYSTEM
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p->boot_cpu_frequency = boot_cpu_frequency;
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p->memctrl = memctrl;
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p->kernel_path = kernel;
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p->console_path = console;
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p->palcode = pal;
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p->boot_osflags = boot_osflags;
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p->init_param = init_param;
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p->readfile = readfile;
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p->system_type = system_type;
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p->system_rev = system_rev;
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p->bin = bin;
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p->binned_fns = binned_fns;
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p->bin_int = bin_int;
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#endif // FULL_SYSTEM
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return new System(p);
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}
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REGISTER_SIM_OBJECT("System", System)
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