gem5/src/arch/x86/isa
Gabe Black b705eba6e5 X86: Fix the wrmsr instruction.
--HG--
extra : convert_revision : 12bc7e71226ebafb8eedadf6a3db82929e15e722
2008-01-12 06:40:55 -05:00
..
decoder X86: Implement mov from control register. 2007-12-01 23:06:03 -08:00
formats X86: Make the "fault" microop predicated. 2007-10-18 22:40:18 -07:00
insts X86: Fix the wrmsr instruction. 2008-01-12 06:40:55 -05:00
microops X86: Implement mov from control register. 2007-12-01 23:06:03 -08:00
bitfields.isa X86: Add a bitfield to indicate whether or not an REX prefix was present. 2007-07-30 13:17:34 -07:00
includes.isa X86: Implement the ldst microop and put it in existing microcode where appropriate. 2007-10-02 22:08:09 -07:00
macroop.isa X86: Implement the in/out instructions. These will still need support from the TLB and memory system. 2007-10-18 22:39:00 -07:00
main.isa Pull some hard coded base classes out of the isa description. 2007-07-14 17:14:19 -07:00
microasm.isa X86: Reorganize segmentation and implement segment selector movs. 2007-12-01 23:03:39 -08:00
operands.isa X86: Reorganize segmentation and implement segment selector movs. 2007-12-01 23:03:39 -08:00
outputblock.isa Pull some hard coded base classes out of the isa description. 2007-07-14 17:14:19 -07:00
specialize.isa X86: Reorganize segmentation and implement segment selector movs. 2007-12-01 23:03:39 -08:00