118 lines
3.3 KiB
C++
118 lines
3.3 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "dev/x86/cmos.hh"
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#include "dev/x86/intdev.hh"
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#include "mem/packet_access.hh"
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void
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X86ISA::Cmos::X86RTC::handleEvent()
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{
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assert(intPin);
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intPin->raise();
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//XXX This is a hack.
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intPin->lower();
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}
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Tick
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X86ISA::Cmos::read(PacketPtr pkt)
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{
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assert(pkt->getSize() == 1);
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switch(pkt->getAddr() - pioAddr)
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{
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case 0x0:
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pkt->set(address);
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break;
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case 0x1:
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pkt->set(readRegister(address));
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break;
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default:
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panic("Read from undefined CMOS port.\n");
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}
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pkt->makeAtomicResponse();
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return latency;
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}
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Tick
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X86ISA::Cmos::write(PacketPtr pkt)
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{
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assert(pkt->getSize() == 1);
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switch(pkt->getAddr() - pioAddr)
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{
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case 0x0:
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address = pkt->get<uint8_t>();
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break;
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case 0x1:
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writeRegister(address, pkt->get<uint8_t>());
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break;
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default:
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panic("Write to undefined CMOS port.\n");
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}
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pkt->makeAtomicResponse();
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return latency;
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}
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uint8_t
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X86ISA::Cmos::readRegister(uint8_t reg)
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{
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assert(reg < numRegs);
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uint8_t val;
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if (reg <= 0xD) {
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val = rtc.readData(reg);
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DPRINTF(CMOS,
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"Reading CMOS RTC reg %x as %x.\n", reg, val);
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} else {
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val = regs[reg];
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DPRINTF(CMOS,
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"Reading non-volitile CMOS address %x as %x.\n", reg, val);
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}
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return val;
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}
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void
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X86ISA::Cmos::writeRegister(uint8_t reg, uint8_t val)
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{
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assert(reg < numRegs);
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if (reg <= 0xD) {
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DPRINTF(CMOS, "Writing CMOS RTC reg %x with %x.\n",
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reg, val);
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rtc.writeData(reg, val);
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} else {
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DPRINTF(CMOS, "Writing non-volitile CMOS address %x with %x.\n",
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reg, val);
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regs[reg] = val;
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}
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}
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X86ISA::Cmos *
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CmosParams::create()
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{
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return new X86ISA::Cmos(this);
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}
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