269 lines
7 KiB
C++
269 lines
7 KiB
C++
/*
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* Copyright (c) 2010 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/arm/insts/misc.hh"
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std::string
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MrsOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ss << ", ";
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bool foundPsr = false;
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for (unsigned i = 0; i < numSrcRegs(); i++) {
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int idx = srcRegIdx(i);
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if (idx < Ctrl_Base_DepTag) {
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continue;
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}
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idx -= Ctrl_Base_DepTag;
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if (idx == MISCREG_CPSR) {
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ss << "cpsr";
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foundPsr = true;
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break;
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}
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if (idx == MISCREG_SPSR) {
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ss << "spsr";
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foundPsr = true;
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break;
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}
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}
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if (!foundPsr) {
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ss << "????";
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}
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return ss.str();
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}
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void
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MsrBase::printMsrBase(std::ostream &os) const
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{
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printMnemonic(os);
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bool apsr = false;
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bool foundPsr = false;
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for (unsigned i = 0; i < numDestRegs(); i++) {
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int idx = destRegIdx(i);
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if (idx < Ctrl_Base_DepTag) {
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continue;
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}
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idx -= Ctrl_Base_DepTag;
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if (idx == MISCREG_CPSR) {
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os << "cpsr_";
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foundPsr = true;
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break;
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}
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if (idx == MISCREG_SPSR) {
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if (bits(byteMask, 1, 0)) {
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os << "spsr_";
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} else {
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os << "apsr_";
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apsr = true;
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}
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foundPsr = true;
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break;
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}
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}
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if (!foundPsr) {
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os << "????";
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return;
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}
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if (bits(byteMask, 3)) {
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if (apsr) {
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os << "nzcvq";
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} else {
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os << "f";
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}
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}
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if (bits(byteMask, 2)) {
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if (apsr) {
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os << "g";
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} else {
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os << "s";
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}
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}
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if (bits(byteMask, 1)) {
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os << "x";
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}
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if (bits(byteMask, 0)) {
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os << "c";
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}
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}
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std::string
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MsrImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMsrBase(ss);
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ccprintf(ss, ", #%#x", imm);
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return ss.str();
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}
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std::string
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MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMsrBase(ss);
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ss << ", ";
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printReg(ss, op1);
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return ss.str();
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}
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std::string
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ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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ccprintf(ss, "#%d", imm);
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return ss.str();
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}
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std::string
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RegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ccprintf(ss, ", #%d", imm);
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return ss.str();
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}
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std::string
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RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ss << ", ";
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printReg(ss, op1);
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return ss.str();
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}
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std::string
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RegRegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ss << ", ";
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printReg(ss, op1);
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ss << ", ";
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printReg(ss, op2);
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ccprintf(ss, ", #%d", imm);
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return ss.str();
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}
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std::string
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RegRegRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ss << ", ";
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printReg(ss, op1);
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ss << ", ";
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printReg(ss, op2);
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ss << ", ";
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printReg(ss, op3);
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return ss.str();
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}
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std::string
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RegRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ss << ", ";
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printReg(ss, op1);
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ss << ", ";
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printReg(ss, op2);
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return ss.str();
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}
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std::string
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RegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ss << ", ";
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printReg(ss, op1);
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ccprintf(ss, ", #%d", imm);
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return ss.str();
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}
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std::string
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RegRegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ss << ", ";
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printReg(ss, op1);
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ccprintf(ss, ", #%d, #%d", imm1, imm2);
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return ss.str();
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}
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std::string
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RegImmRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ccprintf(ss, ", #%d, ", imm);
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printReg(ss, op1);
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return ss.str();
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}
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std::string
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RegImmRegShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, dest);
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ccprintf(ss, ", #%d, ", imm);
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printShiftOperand(ss, op1, true, shiftAmt, INTREG_ZERO, shiftType);
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printReg(ss, op1);
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return ss.str();
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}
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std::string
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UnknownOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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return csprintf("%-10s (inst %#08x)", "unknown", machInst);
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}
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