a46f77e695
The dts files in system/arm/dt currently assume that an (unreleased) gem5-specific virtual encoder is used as a remote endpoint for the HDLCD. This driver won't be released as a more general virtual encoder is about to be posted on the Linux DRI devel list and this encoder has now been merged with gem5's kernel tree. This changeset updates gem5's dts files to use that encoder. Change-Id: Ic1a1be728efd31603752fdfba005b6dbdea42e7e Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Rene De Jong <rene.dejong@arm.com>
143 lines
3.2 KiB
Text
143 lines
3.2 KiB
Text
/*
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* Copyright (c) 2015-2016 ARM Limited
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* All rights reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andreas Sandberg
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*/
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/dts-v1/;
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#include CONF_PLATFORM
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#define CPU(n) \
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cpu@ ## n { \
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device_type = "cpu"; \
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compatible = "gem5,arm", "arm,cortex-a15"; \
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reg = < n >; \
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};
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/ {
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model = "V2P-CA15";
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compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
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memory@80000000 {
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device_type = "memory";
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reg = <0 0x80000000 0x4 0x00000000>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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#if CONF_CPUS > 0
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CPU(0)
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#endif
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#if CONF_CPUS > 1
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CPU(1)
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#endif
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#if CONF_CPUS > 2
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CPU(2)
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#endif
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#if CONF_CPUS > 3
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CPU(3)
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#endif
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#if CONF_CPUS > 4
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CPU(4)
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#endif
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#if CONF_CPUS > 5
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CPU(5)
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#endif
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#if CONF_CPUS > 6
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CPU(6)
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#endif
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#if CONF_CPUS > 7
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CPU(7)
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#endif
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#if CONF_CPUS > 8
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CPU(8)
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#endif
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#if CONF_CPUS > 9
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CPU(9)
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#endif
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#if CONF_CPUS > 10
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CPU(10)
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#endif
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#if CONF_CPUS > 11
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CPU(11)
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#endif
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#if CONF_CPUS > 12
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CPU(12)
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#endif
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#if CONF_CPUS > 13
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CPU(13)
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#endif
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#if CONF_CPUS > 14
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CPU(14)
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#endif
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#if CONF_CPUS > 15
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CPU(15)
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#endif
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#if CONF_CPUS > 16
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#error Unsupported number of CPUs
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#endif
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};
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virt-encoder {
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compatible = "drm,virtual-encoder";
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port {
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hdlcd0_virt_input: endpoint@0 {
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remote-endpoint = <&hdlcd0_output>;
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};
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};
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display-timings {
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native-mode = <&timing0>;
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timing0: timing_1080p60 {
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/* 1920x1080-60 */
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clock-frequency = <148500000>;
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hactive = <1920>;
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vactive = <1080>;
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hfront-porch = <148>;
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hback-porch = <88>;
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hsync-len = <44>;
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vfront-porch = <36>;
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vback-porch = <4>;
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vsync-len = <5>;
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};
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};
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};
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};
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&hdlcd0 {
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status = "ok";
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port {
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hdlcd0_output: endpoint@0 {
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remote-endpoint = <&hdlcd0_virt_input>;
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};
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};
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};
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