Ali Saidi b5a4d95811 rename store conditional stuff as extra data so it can be used for conditional swaps as well ... Add support for a twin 64 bit int load Add Memory barrier and write barrier flags as appropriate Make atomic memory ops atomic src/arch/alpha/isa/mem.isa: src/arch/alpha/locked_mem.hh: src/cpu/base_dyn_inst.hh: src/mem/cache/cache_blk.hh: src/mem/cache/cache_impl.hh: rename store conditional stuff as extra data so it can be used for conditional swaps as well src/arch/alpha/types.hh: src/arch/mips/types.hh: src/arch/sparc/types.hh: add a largest read data type for statically allocating read buffers in atomic simple cpu src/arch/isa_parser.py: Add support for a twin 64 bit int load src/arch/sparc/isa/decoder.isa: Make atomic memory ops atomic Add Memory barrier and write barrier flags as appropriate src/arch/sparc/isa/formats/mem/basicmem.isa: add post access code block and define a twinload format for twin loads src/arch/sparc/isa/formats/mem/blockmem.isa: remove old microcoded twin load coad src/arch/sparc/isa/formats/mem/mem.isa: swap.isa replaces the code in loadstore.isa src/arch/sparc/isa/formats/mem/util.isa: add a post access code block src/arch/sparc/isa/includes.isa: need bigint.hh for Twin64_t src/arch/sparc/isa/operands.isa: add a twin 64 int type src/cpu/simple/atomic.cc: src/cpu/simple/atomic.hh: src/cpu/simple/base.hh: src/cpu/simple/timing.cc: add support for twinloads add support for swap and conditional swap instructions rename store conditional stuff as extra data so it can be used for conditional swaps as well src/mem/packet.cc: src/mem/packet.hh: Add support for atomic swap memory commands src/mem/packet_access.hh: Add endian conversion function for Twin64_t type src/mem/physical.cc: src/mem/physical.hh: src/mem/request.hh: Add support for atomic swap memory commands Rename sc code to extradata --HG-- extra : convert_revision : 69d908512fb34a4e28b29a6e58b807fb1a6b1656		2007-02-12 13:06:30 -05:00
..
isa	Fixed a warning that was breaking compilation.	2007-01-25 01:13:56 -05:00
linux	Implement current working directory for LiveProcesses	2006-11-16 12:43:11 -08:00
regfile	Added basic flatten function for mips.	2006-12-06 05:40:11 -05:00
faults.cc	This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world	2006-07-23 13:39:42 -04:00
faults.hh	This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world	2006-07-23 13:39:42 -04:00
isa_traits.cc	Pushed most of constants.hh back into isa_traits.hh and regfile.hh and created a seperate file for the syscallreturn class.	2006-08-11 19:43:10 -04:00
isa_traits.hh	add ISA_HAS_DELAY_SLOT directive instead of "#if THE_ISA == ALPHA_ISA" throughout CPU models	2006-08-31 20:51:30 -04:00
locked_mem.hh	Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)	2006-10-08 10:53:24 -07:00
mmaped_ipr.hh	some small general fixes to make everythign work nicely with other ISAs, now we can merge back with newmem.	2006-12-15 13:05:46 -05:00
process.cc	Implement current working directory for LiveProcesses	2006-11-16 12:43:11 -08:00
process.hh	Implement current working directory for LiveProcesses	2006-11-16 12:43:11 -08:00
regfile.hh	Pushed most of constants.hh back into isa_traits.hh and regfile.hh and created a seperate file for the syscallreturn class.	2006-08-11 19:43:10 -04:00
remote_gdb.hh	Stub for SE mode gdb support for MIPS.	2006-12-21 20:42:40 -05:00
SConscript	Remove Full System Files	2006-06-11 19:04:22 -04:00
stacktrace.hh	Put the MIPS stacktrace into the MipsISA namespace to fit with Alpha and SPARC.	2006-11-08 16:15:20 -05:00
syscallreturn.hh	Change MIPS's setSyscallReturn to use a thread context.	2006-12-06 05:41:08 -05:00
types.hh	rename store conditional stuff as extra data so it can be used for conditional swaps as well	2007-02-12 13:06:30 -05:00
utility.cc	Cleaned up include files and got rid of many using directives in header files.	2006-08-15 05:07:15 -04:00
utility.hh	Changed makeExtMI to take a ThreadContext instead of a pc.	2006-09-30 02:55:21 -04:00