No description
b5a4d95811
Add support for a twin 64 bit int load
Add Memory barrier and write barrier flags as appropriate
Make atomic memory ops atomic
src/arch/alpha/isa/mem.isa:
src/arch/alpha/locked_mem.hh:
src/cpu/base_dyn_inst.hh:
src/mem/cache/cache_blk.hh:
src/mem/cache/cache_impl.hh:
rename store conditional stuff as extra data so it can be used for conditional swaps as well
src/arch/alpha/types.hh:
src/arch/mips/types.hh:
src/arch/sparc/types.hh:
add a largest read data type for statically allocating read buffers in atomic simple cpu
src/arch/isa_parser.py:
Add support for a twin 64 bit int load
src/arch/sparc/isa/decoder.isa:
Make atomic memory ops atomic
Add Memory barrier and write barrier flags as appropriate
src/arch/sparc/isa/formats/mem/basicmem.isa:
add post access code block and define a twinload format for twin loads
src/arch/sparc/isa/formats/mem/blockmem.isa:
remove old microcoded twin load coad
src/arch/sparc/isa/formats/mem/mem.isa:
swap.isa replaces the code in loadstore.isa
src/arch/sparc/isa/formats/mem/util.isa:
add a post access code block
src/arch/sparc/isa/includes.isa:
need bigint.hh for Twin64_t
src/arch/sparc/isa/operands.isa:
add a twin 64 int type
src/cpu/simple/atomic.cc:
src/cpu/simple/atomic.hh:
src/cpu/simple/base.hh:
src/cpu/simple/timing.cc:
add support for twinloads
add support for swap and conditional swap instructions
rename store conditional stuff as extra data so it can be used for conditional swaps as well
src/mem/packet.cc:
src/mem/packet.hh:
Add support for atomic swap memory commands
src/mem/packet_access.hh:
Add endian conversion function for Twin64_t type
src/mem/physical.cc:
src/mem/physical.hh:
src/mem/request.hh:
Add support for atomic swap memory commands
Rename sc code to extradata
--HG--
extra : convert_revision : 69d908512fb34a4e28b29a6e58b807fb1a6b1656
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| build_opts | ||
| configs | ||
| ext | ||
| src | ||
| tests | ||
| util | ||
| AUTHORS | ||
| LICENSE | ||
| README | ||
| RELEASE_NOTES | ||
| SConstruct | ||
This is release 2.0_beta (patch 1) of the M5 simulator. For detailed information about building the simulator and getting started please refer to http://www.m5sim.org. Specific pages of interest are: http://www.m5sim.org/wiki/index.php/Compiling_M5 http://www.m5sim.org/wiki/index.php/Running_M5 Short version: 1. If you don't have SCons version 0.96.91 or newer, get it from http://wwww.scons.org. 2. If you don't have SWIG version 1.3.28 or newer, get it from http://wwww.swig.org. 3. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'. This will build the debug version of the m5 binary (m5.debug) for the Alpha syscall emulation target, and run the quick regression tests on it. If you have questions, please send mail to m5-users@m5sim.org WHAT'S INCLUDED (AND NOT) ------------------------- The basic source release includes these subdirectories: - m5: - src: source code of the m5 simulator - tests: regression tests - ext: less-common external packages needed to build m5 - system/alpha: source for Alpha console and PALcode To run full-system simulations, you will need compiled console, PALcode, and kernel binaries and one or more disk images. These files are collected in a separate archive, m5_system.tar.bz2. This file can he downloaded separately. M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP Tru64 version of Unix. We are able to distribute Linux and FreeBSD bootdisks, but we are unable to distribute bootable disk images of Tru64 Unix. If you have a Tru64 license and are interested in obtaining disk images, contact us at m5-dev@eecs.umich.edu.