282 lines
7.7 KiB
C++
282 lines
7.7 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#ifndef __ARCH_SPARC_PAGETABLE_HH__
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#define __ARCH_SPARC_PAGETABLE_HH__
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#include <cassert>
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#include "arch/sparc/isa_traits.hh"
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#include "base/bitfield.hh"
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#include "base/misc.hh"
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#include "config/full_system.hh"
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class Checkpoint;
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namespace SparcISA {
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struct VAddr
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{
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VAddr(Addr a) { panic("not implemented yet."); }
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};
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class TteTag
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{
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private:
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uint64_t entry;
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bool populated;
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public:
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TteTag() : entry(0), populated(false) {}
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TteTag(uint64_t e) : entry(e), populated(true) {}
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const TteTag &
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operator=(uint64_t e)
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{
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populated = true;
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entry = e;
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return *this;
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}
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bool valid() const {assert(populated); return !bits(entry,62,62); }
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Addr va() const {assert(populated); return bits(entry,41,0); }
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};
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class PageTableEntry
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{
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public:
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enum EntryType {
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sun4v,
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sun4u,
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invalid
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};
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private:
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uint64_t entry;
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EntryType type;
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uint64_t entry4u;
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bool populated;
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public:
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PageTableEntry()
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: entry(0), type(invalid), populated(false)
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{}
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PageTableEntry(uint64_t e, EntryType t = sun4u)
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: entry(e), type(t), populated(true)
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{
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populate(entry, type);
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}
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void populate(uint64_t e, EntryType t = sun4u)
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{
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entry = e;
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type = t;
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populated = true;
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// If we get a sun4v format TTE, turn it into a sun4u
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if (type == sun4u)
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entry4u = entry;
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else {
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entry4u = 0;
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entry4u |= mbits(entry,63,63); //valid
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entry4u |= bits(entry,1,0) << 61; //size[1:0]
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entry4u |= bits(entry,62,62) << 60; //nfo
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entry4u |= bits(entry,12,12) << 59; //ie
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entry4u |= bits(entry,2,2) << 48; //size[2]
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entry4u |= mbits(entry,39,13); //paddr
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entry4u |= bits(entry,61,61) << 6;; // locked
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entry4u |= bits(entry,10,10) << 5; //cp
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entry4u |= bits(entry,9,9) << 4; //cv
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entry4u |= bits(entry,11,11) << 3; //e
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entry4u |= bits(entry,8,8) << 2; //p
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entry4u |= bits(entry,6,6) << 1; //w
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}
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}
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void
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clear()
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{
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populated = false;
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}
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static int pageSizes[6];
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uint64_t operator()() const { assert(populated); return entry4u; }
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const PageTableEntry &
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operator=(uint64_t e)
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{
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populated = true;
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entry4u = e;
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return *this;
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}
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const PageTableEntry &
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operator=(const PageTableEntry &e)
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{
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populated = true;
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entry4u = e.entry4u;
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type = e.type;
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return *this;
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}
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bool valid() const { return bits(entry4u,63,63) && populated; }
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uint8_t
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_size() const
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{
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assert(populated);
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return bits(entry4u, 62,61) | bits(entry4u, 48,48) << 2;
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}
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Addr size() const { assert(_size() < 6); return pageSizes[_size()]; }
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Addr sizeMask() const { return size() - 1; }
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bool ie() const { return bits(entry4u, 59,59); }
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Addr pfn() const { assert(populated); return bits(entry4u,39,13); }
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Addr paddr() const { assert(populated); return mbits(entry4u, 39,13);}
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bool locked() const { assert(populated); return bits(entry4u,6,6); }
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bool cv() const { assert(populated); return bits(entry4u,4,4); }
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bool cp() const { assert(populated); return bits(entry4u,5,5); }
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bool priv() const { assert(populated); return bits(entry4u,2,2); }
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bool writable() const { assert(populated); return bits(entry4u,1,1); }
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bool nofault() const { assert(populated); return bits(entry4u,60,60); }
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bool sideffect() const { assert(populated); return bits(entry4u,3,3); }
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Addr paddrMask() const { assert(populated); return paddr() & ~sizeMask(); }
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Addr
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translate(Addr vaddr) const
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{
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assert(populated);
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Addr mask = sizeMask();
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return (paddr() & ~mask) | (vaddr & mask);
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}
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};
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struct TlbRange
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{
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Addr va;
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Addr size;
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int contextId;
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int partitionId;
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bool real;
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inline bool
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operator<(const TlbRange &r2) const
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{
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if (real && !r2.real)
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return true;
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if (!real && r2.real)
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return false;
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if (!real && !r2.real) {
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if (contextId < r2.contextId)
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return true;
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else if (contextId > r2.contextId)
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return false;
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}
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if (partitionId < r2.partitionId)
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return true;
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else if (partitionId > r2.partitionId)
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return false;
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if (va < r2.va)
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return true;
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return false;
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}
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inline bool
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operator==(const TlbRange &r2) const
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{
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return va == r2.va &&
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size == r2.size &&
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contextId == r2.contextId &&
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partitionId == r2.partitionId &&
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real == r2.real;
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}
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};
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struct TlbEntry
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{
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TlbEntry()
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{}
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TlbEntry(Addr asn, Addr vaddr, Addr paddr)
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{
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uint64_t entry = 0;
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entry |= 1ULL << 1; // Writable
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entry |= 0ULL << 2; // Available in nonpriveleged mode
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entry |= 0ULL << 3; // No side effects
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entry |= 1ULL << 4; // Virtually cachable
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entry |= 1ULL << 5; // Physically cachable
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entry |= 0ULL << 6; // Not locked
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entry |= mbits(paddr, 39, 13); // Physical address
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entry |= 0ULL << 48; // size = 8k
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entry |= 0uLL << 59; // Endianness not inverted
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entry |= 0ULL << 60; // Not no fault only
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entry |= 0ULL << 61; // size = 8k
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entry |= 1ULL << 63; // valid
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pte = PageTableEntry(entry);
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range.va = vaddr;
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range.size = 8*(1<<10);
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range.contextId = asn;
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range.partitionId = 0;
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range.real = false;
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valid = true;
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}
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TlbRange range;
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PageTableEntry pte;
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bool used;
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bool valid;
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Addr pageStart()
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{
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return pte.paddr();
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}
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void
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updateVaddr(Addr new_vaddr)
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{
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range.va = new_vaddr;
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}
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void serialize(std::ostream &os);
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void unserialize(Checkpoint *cp, const std::string §ion);
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};
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} // namespace SparcISA
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#endif // __ARCH_SPARC_PAGE_TABLE_HH__
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