a8b03e4d01
arch/alpha/isa/decoder.isa:
Make IPR accessing instructions serializing so they are not issued incorrectly in the O3 model.
arch/alpha/isa/pal.isa:
Allow IPR instructions to have flags.
base/traceflags.py:
Include new trace flags from the two new CPU models.
cpu/SConscript:
Create the templates for the split mem accessor methods. Also include the new files from the new models (the Ozone model will be checked in next).
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
Update to the BaseDynInst for the new models.
--HG--
extra : convert_revision : cc82db9c72ec3e29cea4c3fdff74a3843e287a35
134 lines
4.4 KiB
C++
134 lines
4.4 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "base/intmath.hh"
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#include "base/trace.hh"
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#include "cpu/o3/2bit_local_pred.hh"
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DefaultBP::DefaultBP(unsigned _localPredictorSize,
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unsigned _localCtrBits,
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unsigned _instShiftAmt)
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: localPredictorSize(_localPredictorSize),
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localCtrBits(_localCtrBits),
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instShiftAmt(_instShiftAmt)
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{
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if (!isPowerOf2(localPredictorSize)) {
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fatal("Invalid local predictor size!\n");
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}
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localPredictorSets = localPredictorSize / localCtrBits;
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if (!isPowerOf2(localPredictorSets)) {
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fatal("Invalid number of local predictor sets! Check localCtrBits.\n");
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}
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// Setup the index mask.
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indexMask = localPredictorSets - 1;
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DPRINTF(Fetch, "Branch predictor: index mask: %#x\n", indexMask);
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// Setup the array of counters for the local predictor.
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localCtrs.resize(localPredictorSets);
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for (int i = 0; i < localPredictorSets; ++i)
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localCtrs[i].setBits(_localCtrBits);
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DPRINTF(Fetch, "Branch predictor: local predictor size: %i\n",
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localPredictorSize);
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DPRINTF(Fetch, "Branch predictor: local counter bits: %i\n", localCtrBits);
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DPRINTF(Fetch, "Branch predictor: instruction shift amount: %i\n",
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instShiftAmt);
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}
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bool
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DefaultBP::lookup(Addr &branch_addr)
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{
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bool taken;
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uint8_t local_prediction;
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unsigned local_predictor_idx = getLocalIndex(branch_addr);
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DPRINTF(Fetch, "Branch predictor: Looking up index %#x\n",
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local_predictor_idx);
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local_prediction = localCtrs[local_predictor_idx].read();
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DPRINTF(Fetch, "Branch predictor: prediction is %i.\n",
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(int)local_prediction);
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taken = getPrediction(local_prediction);
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#if 0
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// Speculative update.
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if (taken) {
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DPRINTF(Fetch, "Branch predictor: Branch updated as taken.\n");
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localCtrs[local_predictor_idx].increment();
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} else {
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DPRINTF(Fetch, "Branch predictor: Branch updated as not taken.\n");
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localCtrs[local_predictor_idx].decrement();
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}
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#endif
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return taken;
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}
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void
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DefaultBP::update(Addr &branch_addr, bool taken)
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{
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unsigned local_predictor_idx;
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// Update the local predictor.
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local_predictor_idx = getLocalIndex(branch_addr);
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DPRINTF(Fetch, "Branch predictor: Looking up index %#x\n",
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local_predictor_idx);
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if (taken) {
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DPRINTF(Fetch, "Branch predictor: Branch updated as taken.\n");
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localCtrs[local_predictor_idx].increment();
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} else {
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DPRINTF(Fetch, "Branch predictor: Branch updated as not taken.\n");
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localCtrs[local_predictor_idx].decrement();
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}
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}
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inline
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bool
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DefaultBP::getPrediction(uint8_t &count)
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{
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// Get the MSB of the count
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return (count >> (localCtrBits - 1));
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}
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inline
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unsigned
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DefaultBP::getLocalIndex(Addr &branch_addr)
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{
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return (branch_addr >> instShiftAmt) & indexMask;
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}
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