64 lines
1.8 KiB
Ruby
64 lines
1.8 KiB
Ruby
#!/usr/bin/ruby
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#
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# Creates a homogeneous CMP system with a single unified cache per
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# core and a crossbar network. Uses the default parameters listed
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# below, which can be overridden if a wrapper script sets the hash
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# libruby_args.
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#
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require "cfg.rb"
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# default values
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num_cores = 16
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L1_CACHE_SIZE_KB = 32
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L1_CACHE_ASSOC = 8
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L1_CACHE_LATENCY = 2
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num_memories = 2
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memory_size_mb = 1024
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NUM_DMA = 1
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# check for overrides
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for i in 0..$*.size-1 do
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if $*[i] == "-p"
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num_cores = $*[i+1].to_i
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i = i+1
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elsif $*[i] == "-m"
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num_memories = $*[i+1].to_i
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i = i+1
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elsif $*[i] == "-s"
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memory_size_mb = $*[i+1].to_i
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i = i + 1
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end
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end
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net_ports = Array.new
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iface_ports = Array.new
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num_cores.times { |n|
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cache = SetAssociativeCache.new("l1u_"+n.to_s, L1_CACHE_SIZE_KB, L1_CACHE_LATENCY, L1_CACHE_ASSOC, "PSEUDO_LRU")
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sequencer = Sequencer.new("Sequencer_"+n.to_s, cache, cache)
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iface_ports << sequencer
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net_ports << MI_example_CacheController.new("L1CacheController_"+n.to_s,
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"L1Cache",
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[cache],
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sequencer)
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}
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num_memories.times { |n|
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directory = DirectoryMemory.new("DirectoryMemory_"+n.to_s, memory_size_mb/num_memories)
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memory_control = MemoryControl.new("MemoryControl_"+n.to_s)
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net_ports << MI_example_DirectoryController.new("DirectoryController_"+n.to_s,
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"Directory",
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directory, memory_control)
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}
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NUM_DMA.times { |n|
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dma_sequencer = DMASequencer.new("DMASequencer_"+n.to_s)
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iface_ports << dma_sequencer
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net_ports << DMAController.new("DMAController_"+n.to_s, "DMA", dma_sequencer)
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}
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topology = CrossbarTopology.new("theTopology", net_ports)
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on_chip_net = Network.new("theNetwork", topology)
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RubySystem.init(iface_ports, on_chip_net)
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