d30262d480
arch/mips/isa/formats/int.format:
Looks like Integer Ops with Immediates may not need their own separate class because all those instructions are distinct from
their reg-reg counterparts
--HG--
rename : arch/mips/isa/bitfields.def => arch/mips/isa/bitfields.isa
rename : arch/mips/isa/decoder.def => arch/mips/isa/decoder.isa
rename : arch/mips/isa/formats.def => arch/mips/isa/formats.isa
rename : arch/mips/isa/includes.h => arch/mips/isa/includes.isa
rename : arch/mips/isa/operands.def => arch/mips/isa/operands.isa
extra : convert_revision : 8e354b4232b28c0264d98d333d55ef8b5a6589cc
40 lines
738 B
Text
40 lines
738 B
Text
////////////////////////////////////////////////////////////////////
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//
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// Output include file directives.
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//
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output header {{
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#include <sstream>
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#include <iostream>
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#include <iomanip>
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#include "cpu/static_inst.hh"
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#include "traps.hh"
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#include "mem/mem_req.hh" // some constructors use MemReq flags
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}};
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output decoder {{
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#include "base/cprintf.hh"
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#include "base/loader/symtab.hh"
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#include "cpu/exec_context.hh" // for Jump::branchTarget()
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#include <math.h>
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#if defined(linux)
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#include <fenv.h>
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#endif
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}};
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output exec {{
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#include <math.h>
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#if defined(linux)
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#include <fenv.h>
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#endif
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#ifdef FULL_SYSTEM
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//#include "arch/alpha/pseudo_inst.hh"
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#endif
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#include "cpu/base.hh"
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#include "cpu/exetrace.hh"
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#include "sim/sim_exit.hh"
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}};
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