1377 lines
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70 KiB
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1377 lines
No EOL
70 KiB
Text
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================ Begin RubySystem Configuration Print ================
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RubySystem config:
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random_seed: 1234
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randomization: 0
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cycle_period: 1
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block_size_bytes: 64
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block_size_bits: 6
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memory_size_bytes: 134217728
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memory_size_bits: 27
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Network Configuration
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---------------------
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network: SIMPLE_NETWORK
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topology:
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virtual_net_0: active, ordered
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virtual_net_1: active, ordered
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virtual_net_2: active, unordered
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virtual_net_3: active, unordered
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virtual_net_4: active, unordered
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virtual_net_5: active, unordered
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virtual_net_6: inactive
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virtual_net_7: inactive
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virtual_net_8: inactive
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virtual_net_9: inactive
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Profiler Configuration
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----------------------
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periodic_stats_period: 1000000
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================ End RubySystem Configuration Print ================
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Real time: Apr/28/2011 15:17:42
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Profiler Stats
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--------------
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Elapsed_time_in_seconds: 324
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Elapsed_time_in_minutes: 5.4
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Elapsed_time_in_hours: 0.09
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Elapsed_time_in_days: 0.00375
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Virtual_time_in_seconds: 324.34
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Virtual_time_in_minutes: 5.40567
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Virtual_time_in_hours: 0.0900944
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Virtual_time_in_days: 0.00375394
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Ruby_current_time: 38145419
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Ruby_start_time: 0
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Ruby_cycles: 38145419
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mbytes_resident: 37.9102
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mbytes_total: 349.438
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resident_ratio: 0.108511
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ruby_cycles_executed: [ 38145420 38145420 38145420 38145420 38145420 38145420 38145420 38145420 ]
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Busy Controller Counts:
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L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0
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Directory-0:0
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Busy Bank Count:0
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sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1225916 average: 15.9992 | standard deviation: 0.0899551 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 1225796 ]
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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miss_latency: [binsize: 128 max: 20551 count: 1225788 average: 3982.88 | standard deviation: 4666.21 | 3848 14056 25230 33382 32252 38681 43722 45873 39787 34646 37373 35304 29205 26582 23907 22853 19558 18158 17852 14697 14425 13925 14049 12678 11230 12184 12478 11334 11269 10524 11577 10889 10827 11598 10432 10996 10918 11760 11229 10426 11539 11909 11628 11534 11533 12512 12153 12415 13064 12003 12541 12805 13396 12944 11873 12831 13015 12345 12099 11319 12048 11015 10971 10955 9779 9548 9277 9247 8190 7089 7434 7304 6363 6012 5398 5547 4852 4442 4223 3605 3469 3168 3043 2665 2206 2250 2084 1759 1493 1407 1322 1143 1008 1043 774 774 670 591 536 428 447 366 326 293 260 236 190 169 161 145 104 90 98 72 64 67 71 54 48 26 38 25 20 13 12 10 13 8 9 7 3 6 6 6 2 1 3 1 1 0 1 2 3 0 0 2 1 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD: [binsize: 128 max: 19430 count: 796851 average: 3984.07 | standard deviation: 6208.49 | 2458 9184 16308 21587 20825 25166 28439 29994 25975 22600 24394 22918 18914 17196 15531 14710 12720 11836 11583 9562 9318 8985 9055 8223 7279 7999 8102 7408 7359 6960 7502 7044 7103 7524 6929 7165 7100 7555 7259 6751 7534 7807 7490 7464 7519 8139 7784 8089 8491 7791 8186 8379 8707 8457 7710 8411 8440 8069 7834 7452 7821 7218 7139 7113 6315 6239 5984 6045 5324 4603 4810 4747 4088 3935 3497 3582 3151 2907 2827 2358 2250 2072 1922 1718 1463 1465 1315 1155 972 913 857 739 661 677 508 514 424 350 344 277 300 218 208 197 186 165 124 108 91 91 74 67 67 51 40 42 52 29 30 15 23 19 10 6 7 4 8 4 5 5 3 4 5 5 2 0 2 1 1 0 1 2 3 0 0 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST: [binsize: 128 max: 20551 count: 428937 average: 3980.65 | standard deviation: 3082.42 | 1390 4872 8922 11795 11427 13515 15283 15879 13812 12046 12979 12386 10291 9386 8376 8143 6838 6322 6269 5135 5107 4940 4994 4455 3951 4185 4376 3926 3910 3564 4075 3845 3724 4074 3503 3831 3818 4205 3970 3675 4005 4102 4138 4070 4014 4373 4369 4326 4573 4212 4355 4426 4689 4487 4163 4420 4575 4276 4265 3867 4227 3797 3832 3842 3464 3309 3293 3202 2866 2486 2624 2557 2275 2077 1901 1965 1701 1535 1396 1247 1219 1096 1121 947 743 785 769 604 521 494 465 404 347 366 266 260 246 241 192 151 147 148 118 96 74 71 66 61 70 54 30 23 31 21 24 25 19 25 18 11 15 6 10 7 5 6 5 4 4 2 0 2 1 1 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache: [binsize: 1 max: 2 count: 227 average: 2 | standard deviation: 0 | 0 0 227 ]
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miss_latency_L2Cache: [binsize: 64 max: 10432 count: 676 average: 657.902 | standard deviation: 953.13 | 264 17 21 16 15 11 23 17 31 14 20 15 10 13 13 18 13 9 7 9 8 6 14 10 7 7 6 4 3 3 3 3 0 4 2 4 3 3 2 2 2 1 1 1 0 0 1 1 0 0 2 0 2 1 1 2 1 0 1 3 0 0 0 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_Directory: [binsize: 128 max: 20551 count: 1184984 average: 4003.39 | standard deviation: 4756.57 | 0 12549 23909 31725 30593 37285 42557 44681 38724 33850 36643 34521 28631 26023 23380 22388 19102 17741 17416 14279 14052 13581 13693 12284 10885 11841 12099 10978 10910 10155 11217 10547 10485 11217 10036 10663 10545 11379 10822 10058 11144 11498 11229 11177 11117 12080 11759 12013 12646 11578 12146 12380 12969 12564 11482 12461 12620 11959 11745 10947 11702 10703 10703 10671 9484 9314 9040 9025 7957 6902 7257 7124 6214 5863 5285 5424 4760 4342 4144 3498 3400 3098 2989 2624 2164 2205 2034 1723 1469 1372 1288 1122 982 1018 761 760 661 583 527 419 440 358 320 291 254 228 186 166 156 141 104 88 97 69 63 65 69 53 48 26 36 24 20 13 12 10 13 8 8 7 3 6 6 6 2 1 3 1 1 0 1 2 3 0 0 2 1 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache_wCC: [binsize: 128 max: 16474 count: 39901 average: 3452.47 | standard deviation: 3062.61 | 3340 1470 1295 1617 1614 1361 1142 1161 1041 780 716 759 560 549 521 459 452 411 430 414 370 342 356 392 345 341 376 353 358 365 360 341 342 379 395 333 373 381 407 368 395 411 399 357 416 432 394 402 418 425 395 425 427 380 391 370 395 386 354 372 346 312 268 284 295 234 237 221 233 187 177 180 149 149 113 123 92 100 79 107 69 69 54 41 42 45 50 36 24 35 34 21 26 25 13 14 9 8 9 9 7 8 6 2 6 8 4 3 5 4 0 2 1 3 1 2 2 1 0 0 2 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_issue_to_initial_request: [binsize: 128 max: 15222 count: 39829 average: 3270.99 | standard deviation: 3042.86 | 4876 1681 1484 1828 1468 1283 1048 1054 798 619 612 587 449 445 423 411 403 390 415 363 358 313 374 368 295 374 378 382 372 338 372 346 342 370 364 353 369 410 398 354 395 441 387 403 374 423 408 391 454 395 414 439 393 394 370 363 388 353 375 323 302 291 281 272 253 236 227 210 182 149 151 153 132 116 112 94 96 82 83 76 63 64 39 42 31 46 45 24 22 21 26 15 20 17 13 9 7 7 8 12 8 3 3 3 6 3 2 2 3 3 1 1 3 1 1 3 3 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_initial_forward_request: [binsize: 32 max: 3817 count: 39829 average: 154.675 | standard deviation: 327.364 | 28632 626 455 567 456 398 421 432 516 423 386 373 392 492 409 377 329 286 322 228 188 185 180 207 149 157 146 135 209 156 135 125 108 101 80 70 69 63 77 55 46 45 49 68 38 42 36 30 32 24 19 22 22 17 12 16 9 8 23 9 9 10 10 13 8 6 9 7 8 2 7 5 8 8 0 5 0 1 3 1 3 2 2 1 2 2 0 0 1 1 2 1 1 2 1 0 2 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 37 count: 39829 average: 24.627 | standard deviation: 1.1574 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 29025 279 9248 108 411 428 272 27 19 8 2 0 1 1 ]
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miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 15 count: 39829 average: 1.76316 | standard deviation: 1.5953 | 9378 10018 10256 6211 1213 1053 1401 73 105 50 52 15 1 2 0 1 ]
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imcomplete_wCC_Times: 72
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miss_latency_dir_issue_to_initial_request: [binsize: 128 max: 19491 count: 1184984 average: 3282.38 | standard deviation: 4734.2 | 143223 49296 46398 55451 43551 36339 32336 31086 22907 17551 18007 17146 14183 13001 12470 12642 11442 11296 12025 10675 10865 10800 11533 10724 9596 10688 10913 10285 10341 10019 11028 10413 10628 11175 10328 10846 11189 11946 11324 10640 11882 12523 12102 12139 11694 12866 12523 12578 13126 11756 12340 12124 12954 11994 10574 11535 11495 10600 10061 9413 9576 8561 8293 8288 6916 6774 6472 6346 5530 4784 4952 4547 4083 3616 3184 3258 2788 2577 2319 1995 1917 1700 1620 1397 1118 1121 1027 916 780 664 627 568 542 429 357 354 297 283 245 197 174 164 132 108 99 95 90 72 58 48 36 33 41 45 27 32 16 16 17 13 10 4 8 6 3 2 7 8 4 0 2 1 0 1 1 0 1 1 1 0 1 0 0 1 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_dir_initial_forward_request: [binsize: 32 max: 3453 count: 1184984 average: 11.605 | standard deviation: 55.1581 | 1178448 215 300 279 283 276 279 210 217 184 179 208 147 123 124 160 258 227 219 202 165 220 166 123 110 114 125 73 74 73 69 91 89 87 65 68 77 48 60 32 38 31 25 28 24 17 35 29 19 20 19 25 20 10 9 9 13 12 13 4 12 7 7 6 8 5 9 4 8 2 6 6 4 3 3 1 2 1 2 2 2 2 1 0 1 1 2 1 0 0 0 3 2 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_dir_forward_to_first_response: [binsize: 1 max: 40 count: 1184984 average: 24.8319 | standard deviation: 1.27932 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 760290 10031 365271 3169 15438 16593 11337 1277 755 506 119 131 54 8 1 2 2 ]
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miss_latency_dir_first_response_to_completion: [binsize: 32 max: 4587 count: 1184984 average: 684.581 | standard deviation: 462.02 | 0 0 0 28666 38505 34388 37992 44013 50788 42338 41151 40348 44196 48854 38277 35624 33153 33637 34560 27975 27240 26405 28884 31585 26462 26370 25825 28076 28476 21383 18788 16171 15795 15463 11926 11428 10383 11071 11478 9218 8966 8766 9180 9582 7298 6400 5546 5573 5427 4158 3897 3552 3798 3997 3005 2931 2831 3019 3010 2266 1943 1676 1696 1775 1372 1207 1176 1212 1198 879 912 860 828 852 660 606 520 495 444 382 356 315 327 348 256 239 210 241 232 158 156 124 115 124 87 77 75 80 82 51 53 57 58 40 33 32 24 33 22 19 10 16 16 24 10 10 11 8 14 2 9 4 3 3 2 2 6 2 2 3 4 2 0 2 2 2 0 3 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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imcomplete_dir_Times: 0
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miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 151 average: 2 | standard deviation: 0 | 0 0 151 ]
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miss_latency_LD_L2Cache: [binsize: 64 max: 10432 count: 439 average: 677.317 | standard deviation: 1032 | 171 11 17 11 7 7 19 10 19 7 11 10 10 9 8 11 7 5 3 5 4 3 6 9 5 5 6 2 3 3 2 3 0 4 0 3 2 2 1 0 1 0 0 0 0 0 1 1 0 0 2 0 2 1 1 0 1 0 1 2 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD_Directory: [binsize: 128 max: 19430 count: 770484 average: 4004.28 | standard deviation: 6368.74 | 0 8188 15458 20532 19786 24298 27675 29213 25281 22083 23920 22404 18534 16835 15206 14422 12414 11556 11278 9293 9086 8767 8817 7959 7073 7770 7845 7184 7120 6742 7269 6822 6877 7267 6663 6949 6870 7308 7000 6507 7283 7539 7233 7239 7263 7856 7543 7831 8220 7502 7931 8092 8436 8192 7436 8169 8187 7825 7599 7212 7586 7021 6967 6937 6126 6082 5818 5901 5186 4479 4691 4629 3990 3842 3431 3504 3093 2839 2770 2293 2215 2019 1890 1692 1438 1433 1287 1136 957 889 839 726 647 658 498 506 418 347 336 271 296 216 204 196 181 161 121 107 88 89 74 65 66 48 40 41 50 29 30 15 21 18 10 6 7 4 8 4 5 5 3 4 5 5 2 0 2 1 1 0 1 2 3 0 0 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD_L1Cache_wCC: [binsize: 128 max: 15557 count: 25777 average: 3459.67 | standard deviation: 3055.49 | 2125 968 836 1026 1013 847 745 762 682 509 467 499 370 353 319 283 302 277 301 268 231 218 238 262 206 227 254 223 238 215 233 221 226 256 265 216 230 247 259 244 251 268 257 225 256 283 241 258 271 289 255 287 271 265 274 242 253 244 235 240 235 197 172 176 189 157 166 143 138 124 119 118 98 93 66 78 58 68 57 65 35 52 32 26 25 32 28 19 15 24 18 13 14 19 10 8 6 3 8 6 4 2 4 1 5 4 3 1 3 2 0 2 1 3 0 1 2 0 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 76 average: 2 | standard deviation: 0 | 0 0 76 ]
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miss_latency_ST_L2Cache: [binsize: 32 max: 4322 count: 237 average: 621.941 | standard deviation: 787.221 | 89 4 3 3 3 1 3 2 5 3 2 2 2 2 2 5 8 4 6 1 6 3 2 3 0 0 3 1 2 3 3 4 4 2 3 1 1 3 2 2 1 3 1 2 3 5 0 1 2 0 1 1 0 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 2 0 0 1 0 1 1 0 1 0 1 1 0 1 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_Directory: [binsize: 128 max: 20551 count: 414500 average: 4001.75 | standard deviation: 3080.55 | 0 4361 8451 11193 10807 12987 14882 15468 13443 11767 12723 12117 10097 9188 8174 7966 6688 6185 6138 4986 4966 4814 4876 4325 3812 4071 4254 3794 3790 3413 3948 3725 3608 3950 3373 3714 3675 4071 3822 3551 3861 3959 3996 3938 3854 4224 4216 4182 4426 4076 4215 4288 4533 4372 4046 4292 4433 4134 4146 3735 4116 3682 3736 3734 3358 3232 3222 3124 2771 2423 2566 2495 2224 2021 1854 1920 1667 1503 1374 1205 1185 1079 1099 932 726 772 747 587 512 483 449 396 335 360 263 254 243 236 191 148 144 142 116 95 73 67 65 59 68 52 30 23 31 21 23 24 19 24 18 11 15 6 10 7 5 6 5 4 3 2 0 2 1 1 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache_wCC: [binsize: 128 max: 16474 count: 14124 average: 3439.33 | standard deviation: 3075.63 | 1215 502 459 591 601 514 397 399 359 271 249 260 190 196 202 176 150 134 129 146 139 124 118 130 139 114 122 130 120 150 127 120 116 123 130 117 143 134 148 124 144 143 142 132 160 149 153 144 147 136 140 138 156 115 117 128 142 142 119 132 111 115 96 108 106 77 71 78 95 63 58 62 51 56 47 45 34 32 22 42 34 17 22 15 17 13 22 17 9 11 16 8 12 6 3 6 3 5 1 3 3 6 2 1 1 4 1 2 2 2 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Resource Usage
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--------------
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page_size: 4096
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user_time: 324
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system_time: 0
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page_reclaims: 10976
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page_faults: 0
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swaps: 0
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block_inputs: 0
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block_outputs: 0
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Network Stats
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-------------
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total_msg_count_Request_Control: 3674943 29399544
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total_msg_count_Response_Data: 3674646 264574512
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total_msg_count_Response_Control: 25602036 204816288
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total_msg_count_Writeback_Data: 1270962 91509264
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total_msg_count_Writeback_Control: 9126360 73010880
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total_msg_count_Broadcast_Control: 18372540 146980320
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total_msg_count_Unblock_Control: 3674736 29397888
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total_msgs: 65396223 total_bytes: 839688696
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switch_0_inlinks: 2
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switch_0_outlinks: 2
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links_utilized_percent_switch_0: 3.78992
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links_utilized_percent_switch_0_link_0: 4.7901 bw: 16000 base_latency: 1
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links_utilized_percent_switch_0_link_1: 2.78974 bw: 16000 base_latency: 1
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outgoing_messages_switch_0_link_0_Request_Control: 9 72 [ 0 0 0 9 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Data: 152712 10995264 [ 0 0 0 0 152712 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Control: 1063930 8511440 [ 0 0 0 0 1063930 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Writeback_Control: 143927 1151416 [ 0 0 0 143927 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Broadcast_Control: 1072131 8577048 [ 0 0 0 1072131 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Request_Control: 152716 1221728 [ 0 0 152716 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Response_Data: 5001 360072 [ 0 0 0 0 5001 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Response_Control: 1067137 8537096 [ 0 0 0 0 1067137 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Writeback_Data: 52861 3805992 [ 0 0 0 0 0 52861 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Writeback_Control: 234988 1879904 [ 0 0 143927 0 0 91061 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Unblock_Control: 152718 1221744 [ 0 0 0 0 0 152718 0 0 0 0 ] base_latency: 1
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switch_1_inlinks: 2
|
|
switch_1_outlinks: 2
|
|
links_utilized_percent_switch_1: 3.79943
|
|
links_utilized_percent_switch_1_link_0: 4.80577 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_1_link_1: 2.79309 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_0_Request_Control: 6 48 [ 0 0 0 6 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_0_Response_Data: 153460 11049120 [ 0 0 0 0 153460 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_0_Response_Control: 1069199 8553592 [ 0 0 0 0 1069199 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_0_Writeback_Control: 144634 1157072 [ 0 0 0 144634 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_0_Broadcast_Control: 1071386 8571088 [ 0 0 0 1071386 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Request_Control: 153462 1227696 [ 0 0 153462 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Response_Data: 5004 360288 [ 0 0 0 0 5004 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Response_Control: 1066388 8531104 [ 0 0 0 0 1066388 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Writeback_Data: 52907 3809304 [ 0 0 0 0 0 52907 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Writeback_Control: 236353 1890824 [ 0 0 144634 0 0 91719 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Unblock_Control: 153466 1227728 [ 0 0 0 0 0 153466 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_2_inlinks: 2
|
|
switch_2_outlinks: 2
|
|
links_utilized_percent_switch_2: 3.80262
|
|
links_utilized_percent_switch_2_link_0: 4.80937 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_2_link_1: 2.79587 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_0_Request_Control: 9 72 [ 0 0 0 9 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_0_Response_Data: 153621 11060712 [ 0 0 0 0 153621 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_0_Response_Control: 1070301 8562408 [ 0 0 0 0 1070301 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_0_Writeback_Control: 144993 1159944 [ 0 0 0 144993 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_0_Broadcast_Control: 1071220 8569760 [ 0 0 0 1071220 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Request_Control: 153624 1228992 [ 0 0 153624 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Response_Data: 4966 357552 [ 0 0 0 0 4966 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Response_Control: 1066261 8530088 [ 0 0 0 0 1066261 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Writeback_Data: 53101 3823272 [ 0 0 0 0 0 53101 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Writeback_Control: 236884 1895072 [ 0 0 144993 0 0 91891 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Unblock_Control: 153621 1228968 [ 0 0 0 0 0 153621 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_3_inlinks: 2
|
|
switch_3_outlinks: 2
|
|
links_utilized_percent_switch_3: 3.79539
|
|
links_utilized_percent_switch_3_link_0: 4.79687 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_3_link_1: 2.79392 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_0_Request_Control: 7 56 [ 0 0 0 7 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_0_Response_Data: 153031 11018232 [ 0 0 0 0 153031 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_0_Response_Control: 1066064 8528512 [ 0 0 0 0 1066064 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_0_Writeback_Control: 144405 1155240 [ 0 0 0 144405 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_0_Broadcast_Control: 1071814 8574512 [ 0 0 0 1071814 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Request_Control: 153035 1224280 [ 0 0 153035 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Response_Data: 4898 352656 [ 0 0 0 0 4898 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Response_Control: 1066921 8535368 [ 0 0 0 0 1066921 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Writeback_Data: 53203 3830616 [ 0 0 0 0 0 53203 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Writeback_Control: 235604 1884832 [ 0 0 144405 0 0 91199 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Unblock_Control: 153035 1224280 [ 0 0 0 0 0 153035 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_4_inlinks: 2
|
|
switch_4_outlinks: 2
|
|
links_utilized_percent_switch_4: 3.79228
|
|
links_utilized_percent_switch_4_link_0: 4.79554 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_4_link_1: 2.78903 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_0_Request_Control: 11 88 [ 0 0 0 11 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_0_Response_Data: 152968 11013696 [ 0 0 0 0 152968 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_0_Response_Control: 1065707 8525656 [ 0 0 0 0 1065707 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_0_Writeback_Control: 144256 1154048 [ 0 0 0 144256 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_0_Broadcast_Control: 1071872 8574976 [ 0 0 0 1071872 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Request_Control: 152972 1223776 [ 0 0 152972 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Response_Data: 4918 354096 [ 0 0 0 0 4918 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Response_Control: 1066963 8535704 [ 0 0 0 0 1066963 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Writeback_Data: 52762 3798864 [ 0 0 0 0 0 52762 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Writeback_Control: 235747 1885976 [ 0 0 144256 0 0 91491 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Unblock_Control: 152972 1223776 [ 0 0 0 0 0 152972 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_5_inlinks: 2
|
|
switch_5_outlinks: 2
|
|
links_utilized_percent_switch_5: 3.79634
|
|
links_utilized_percent_switch_5_link_0: 4.79767 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_5_link_1: 2.795 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_0_Request_Control: 12 96 [ 0 0 0 12 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_0_Response_Data: 153068 11020896 [ 0 0 0 0 153068 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_0_Response_Control: 1066430 8531440 [ 0 0 0 0 1066430 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_0_Writeback_Control: 144356 1154848 [ 0 0 0 144356 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_0_Broadcast_Control: 1071773 8574184 [ 0 0 0 1071773 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Request_Control: 153072 1224576 [ 0 0 153072 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Response_Data: 4986 358992 [ 0 0 0 0 4986 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Response_Control: 1066797 8534376 [ 0 0 0 0 1066797 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Writeback_Data: 53226 3832272 [ 0 0 0 0 0 53226 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Writeback_Control: 235481 1883848 [ 0 0 144356 0 0 91125 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Unblock_Control: 153073 1224584 [ 0 0 0 0 0 153073 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_6_inlinks: 2
|
|
switch_6_outlinks: 2
|
|
links_utilized_percent_switch_6: 3.79651
|
|
links_utilized_percent_switch_6_link_0: 4.80041 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_6_link_1: 2.79262 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_0_Request_Control: 11 88 [ 0 0 0 11 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_0_Response_Data: 153181 11029032 [ 0 0 0 0 153181 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_0_Response_Control: 1067418 8539344 [ 0 0 0 0 1067418 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_0_Writeback_Control: 144558 1156464 [ 0 0 0 144558 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_0_Broadcast_Control: 1071660 8573280 [ 0 0 0 1071660 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Request_Control: 153184 1225472 [ 0 0 153184 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Response_Data: 5056 364032 [ 0 0 0 0 5056 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Response_Control: 1066613 8532904 [ 0 0 0 0 1066613 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Writeback_Data: 52864 3806208 [ 0 0 0 0 0 52864 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Writeback_Control: 236251 1890008 [ 0 0 144558 0 0 91693 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Unblock_Control: 153182 1225456 [ 0 0 0 0 0 153182 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_7_inlinks: 2
|
|
switch_7_outlinks: 2
|
|
links_utilized_percent_switch_7: 3.79143
|
|
links_utilized_percent_switch_7_link_0: 4.79307 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_7_link_1: 2.78979 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_0_Request_Control: 7 56 [ 0 0 0 7 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Response_Data: 152841 11004552 [ 0 0 0 0 152841 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Response_Control: 1064963 8519704 [ 0 0 0 0 1064963 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Writeback_Control: 144139 1153112 [ 0 0 0 144139 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Broadcast_Control: 1071996 8575968 [ 0 0 0 1071996 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Request_Control: 152844 1222752 [ 0 0 152844 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Response_Data: 5069 364968 [ 0 0 0 0 5069 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Response_Control: 1066932 8535456 [ 0 0 0 0 1066932 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Writeback_Data: 52730 3796560 [ 0 0 0 0 0 52730 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Writeback_Control: 235544 1884352 [ 0 0 144139 0 0 91405 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Unblock_Control: 152845 1222760 [ 0 0 0 0 0 152845 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_8_inlinks: 2
|
|
switch_8_outlinks: 2
|
|
links_utilized_percent_switch_8: 13.8907
|
|
links_utilized_percent_switch_8_link_0: 10.6822 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_8_link_1: 17.0991 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_0_Request_Control: 1224909 9799272 [ 0 0 1224909 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_0_Writeback_Data: 423654 30503088 [ 0 0 0 0 0 423654 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_0_Writeback_Control: 1886852 15094816 [ 0 0 1155268 0 0 731584 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_0_Unblock_Control: 1224912 9799296 [ 0 0 0 0 0 1224912 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Request_Control: 72 576 [ 0 0 0 72 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Response_Data: 1184984 85318848 [ 0 0 0 0 1184984 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Writeback_Control: 1155268 9242144 [ 0 0 0 1155268 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Broadcast_Control: 1224836 9798688 [ 0 0 0 1224836 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_9_inlinks: 9
|
|
switch_9_outlinks: 9
|
|
links_utilized_percent_switch_9: 5.45234
|
|
links_utilized_percent_switch_9_link_0: 4.7901 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_1: 4.80577 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_2: 4.80937 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_3: 4.79687 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_4: 4.79554 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_5: 4.79767 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_6: 4.80041 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_7: 4.79307 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_8: 10.6822 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_0_Request_Control: 9 72 [ 0 0 0 9 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Response_Data: 152712 10995264 [ 0 0 0 0 152712 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Response_Control: 1063930 8511440 [ 0 0 0 0 1063930 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Writeback_Control: 143927 1151416 [ 0 0 0 143927 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Broadcast_Control: 1072131 8577048 [ 0 0 0 1072131 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Request_Control: 6 48 [ 0 0 0 6 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Response_Data: 153460 11049120 [ 0 0 0 0 153460 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Response_Control: 1069199 8553592 [ 0 0 0 0 1069199 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Writeback_Control: 144634 1157072 [ 0 0 0 144634 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Broadcast_Control: 1071386 8571088 [ 0 0 0 1071386 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Request_Control: 9 72 [ 0 0 0 9 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Response_Data: 153621 11060712 [ 0 0 0 0 153621 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Response_Control: 1070301 8562408 [ 0 0 0 0 1070301 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Writeback_Control: 144993 1159944 [ 0 0 0 144993 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Broadcast_Control: 1071220 8569760 [ 0 0 0 1071220 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Request_Control: 7 56 [ 0 0 0 7 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Response_Data: 153031 11018232 [ 0 0 0 0 153031 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Response_Control: 1066064 8528512 [ 0 0 0 0 1066064 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Writeback_Control: 144405 1155240 [ 0 0 0 144405 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Broadcast_Control: 1071814 8574512 [ 0 0 0 1071814 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Request_Control: 11 88 [ 0 0 0 11 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Response_Data: 152968 11013696 [ 0 0 0 0 152968 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Response_Control: 1065707 8525656 [ 0 0 0 0 1065707 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Writeback_Control: 144256 1154048 [ 0 0 0 144256 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Broadcast_Control: 1071872 8574976 [ 0 0 0 1071872 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Request_Control: 12 96 [ 0 0 0 12 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Response_Data: 153068 11020896 [ 0 0 0 0 153068 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Response_Control: 1066430 8531440 [ 0 0 0 0 1066430 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Writeback_Control: 144356 1154848 [ 0 0 0 144356 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Broadcast_Control: 1071773 8574184 [ 0 0 0 1071773 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Request_Control: 11 88 [ 0 0 0 11 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Response_Data: 153181 11029032 [ 0 0 0 0 153181 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Response_Control: 1067418 8539344 [ 0 0 0 0 1067418 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Writeback_Control: 144558 1156464 [ 0 0 0 144558 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Broadcast_Control: 1071660 8573280 [ 0 0 0 1071660 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Request_Control: 7 56 [ 0 0 0 7 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Response_Data: 152841 11004552 [ 0 0 0 0 152841 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Response_Control: 1064963 8519704 [ 0 0 0 0 1064963 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Writeback_Control: 144139 1153112 [ 0 0 0 144139 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Broadcast_Control: 1071996 8575968 [ 0 0 0 1071996 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Request_Control: 1224909 9799272 [ 0 0 1224909 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Writeback_Data: 423654 30503088 [ 0 0 0 0 0 423654 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Writeback_Control: 1886852 15094816 [ 0 0 1155268 0 0 731584 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Unblock_Control: 1224912 9799296 [ 0 0 0 0 0 1224912 0 0 0 0 ] base_latency: 1
|
|
|
|
Cache Stats: system.l1_cntrl0.L1IcacheMemory
|
|
system.l1_cntrl0.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl0.L1DcacheMemory
|
|
system.l1_cntrl0.L1DcacheMemory_total_misses: 152856
|
|
system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 152856
|
|
system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_request_type_LD: 64.952%
|
|
system.l1_cntrl0.L1DcacheMemory_request_type_ST: 35.048%
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 152856 100%
|
|
|
|
Cache Stats: system.l1_cntrl0.L2cacheMemory
|
|
system.l1_cntrl0.L2cacheMemory_total_misses: 152856
|
|
system.l1_cntrl0.L2cacheMemory_total_demand_misses: 152856
|
|
system.l1_cntrl0.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl0.L2cacheMemory_request_type_LD: 64.952%
|
|
system.l1_cntrl0.L2cacheMemory_request_type_ST: 35.048%
|
|
|
|
system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 152856 100%
|
|
|
|
--- L1Cache ---
|
|
- Event Counts -
|
|
Load [99836 99426 99826 99565 99332 100097 100084 99394 ] 797560
|
|
Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
Store [53382 53907 53599 53512 53609 53612 53768 53907 ] 429296
|
|
L2_Replacement [152956 153058 153169 152825 152699 153446 153612 153020 ] 1224785
|
|
L1_to_L2 [1709336 1706454 1716777 1706039 1711172 1706883 1717740 1707931 ] 13682332
|
|
Trigger_L2_to_L1D [164 159 163 149 140 147 143 169 ] 1234
|
|
Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
Complete_L2_to_L1 [164 159 163 149 140 147 143 169 ] 1234
|
|
Other_GETX [375319 374833 375098 375206 375119 375092 374928 374801 ] 3000396
|
|
Other_GETS [696553 696940 696562 696790 697012 696294 696292 697013 ] 5573456
|
|
Merged_GETS [11 12 11 7 9 6 9 7 ] 72
|
|
Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
Ack [1065597 1066314 1067288 1064836 1063816 1069079 1070172 1065955 ] 8533057
|
|
Shared_Ack [110 116 130 127 114 120 129 109 ] 955
|
|
Data [5681 5804 5729 5678 5797 5878 5771 5683 ] 46021
|
|
Shared_Data [2109 2095 1989 2085 2106 2060 2023 2104 ] 16571
|
|
Exclusive_Data [145178 145169 145463 145078 144809 145522 145827 145244 ] 1162290
|
|
Writeback_Ack [144256 144356 144558 144139 143927 144634 144993 144405 ] 1155268
|
|
Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
|
All_acks [2206 2198 2102 2193 2204 2166 2141 2195 ] 17405
|
|
All_acks_no_sharers [150763 150870 151079 150648 150509 151294 151480 150837 ] 1207480
|
|
Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
Block_Ack [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
- Transitions -
|
|
I Load [99663 99277 99654 99422 99207 99926 99924 99208 ] 796281
|
|
I Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
I Store [53307 53793 53529 53418 53507 53533 53700 53825 ] 428612
|
|
I L2_Replacement [2904 2951 2983 3067 3002 2991 2988 2906 ] 23792
|
|
I L1_to_L2 [616 667 646 672 627 686 639 640 ] 5193
|
|
I Trigger_L2_to_L1D [5 3 5 5 6 2 2 5 ] 33
|
|
I Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
I Other_GETX [373498 372958 373249 373304 373263 373267 373086 373074 ] 2985699
|
|
I Other_GETS [693268 693612 693177 693413 693657 692920 692997 693658 ] 5546702
|
|
I Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
I NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
I Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
I Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
S Load [5 4 4 4 3 3 3 4 ] 30
|
|
S Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
S Store [1 2 1 4 1 3 0 1 ] 13
|
|
S L2_Replacement [5796 5751 5628 5619 5770 5821 5631 5709 ] 45725
|
|
S L1_to_L2 [5854 5827 5676 5681 5826 5877 5680 5769 ] 46190
|
|
S Trigger_L2_to_L1D [8 8 5 6 4 6 4 9 ] 50
|
|
S Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
S Other_GETX [63 79 58 68 62 61 63 65 ] 519
|
|
S Other_GETS [115 132 114 129 139 118 98 110 ] 955
|
|
S Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
S NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
S Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
S Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
O Load [0 1 2 1 2 0 0 2 ] 8
|
|
O Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
O Store [1 0 0 0 1 0 0 1 ] 3
|
|
O L2_Replacement [2023 2054 2095 2016 2006 2017 1995 2002 ] 16208
|
|
O L1_to_L2 [440 436 484 451 450 440 422 443 ] 3566
|
|
O Trigger_L2_to_L1D [1 0 3 1 3 0 0 4 ] 12
|
|
O Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
O Other_GETX [16 13 8 18 14 14 13 18 ] 114
|
|
O Other_GETS [22 22 17 21 25 24 23 20 ] 174
|
|
O Merged_GETS [1 7 2 0 3 2 1 2 ] 18
|
|
O Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
O NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
O Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
O Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
M Load [50 39 48 43 28 46 47 49 ] 350
|
|
M Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
M Store [13 32 19 18 33 25 20 27 ] 187
|
|
M L2_Replacement [90623 90208 90706 90518 90185 90866 91092 90336 ] 724534
|
|
M L1_to_L2 [93197 92807 93311 93090 92736 93401 93650 92820 ] 745012
|
|
M Trigger_L2_to_L1D [88 91 93 92 76 99 89 94 ] 722
|
|
M Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
M Other_GETX [1126 1131 1139 1161 1129 1116 1105 1045 ] 8952
|
|
M Other_GETS [2030 2062 2094 2027 2015 2027 2000 2016 ] 16271
|
|
M Merged_GETS [4 2 3 3 2 1 5 2 ] 22
|
|
M Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
M NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
M Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
M Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM Load [24 27 31 19 20 21 27 33 ] 202
|
|
MM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MM Store [22 22 17 16 12 12 11 14 ] 126
|
|
MM L2_Replacement [51610 52094 51757 51605 51736 51751 51906 52067 ] 414526
|
|
MM L1_to_L2 [53019 53486 53221 53086 53207 53196 53370 53523 ] 426108
|
|
MM Trigger_L2_to_L1D [62 57 57 45 51 40 48 57 ] 417
|
|
MM Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
MM Other_GETX [607 642 634 646 638 621 651 588 ] 5027
|
|
MM Other_GETS [1096 1088 1148 1179 1163 1181 1158 1193 ] 9206
|
|
MM Merged_GETS [6 3 6 4 4 3 3 3 ] 32
|
|
MM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
MM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
MM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IM Load [0 0 0 0 0 0 0 0 ] 0
|
|
IM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IM Store [0 0 0 0 0 0 0 0 ] 0
|
|
IM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
IM L1_to_L2 [541503 544121 548499 539673 542556 541150 542514 545826 ] 4345842
|
|
IM Other_GETX [1 1 3 3 1 3 3 2 ] 17
|
|
IM Other_GETS [8 5 4 6 3 6 6 2 ] 40
|
|
IM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
IM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
IM Ack [366019 369518 367839 367229 367501 367910 368803 369586 ] 2944405
|
|
IM Data [1928 2064 2030 2068 2068 2049 2099 2011 ] 16317
|
|
IM Exclusive_Data [51379 51729 51499 51349 51439 51483 51599 51814 ] 412291
|
|
IM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SM Load [0 0 0 0 0 0 0 0 ] 0
|
|
SM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
SM Store [0 0 0 0 0 0 0 0 ] 0
|
|
SM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
SM L1_to_L2 [8 4 0 10 0 1 0 0 ] 23
|
|
SM Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
SM Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
SM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
SM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
SM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
SM Ack [7 14 7 16 7 17 0 7 ] 75
|
|
SM Data [1 2 1 4 1 3 0 1 ] 13
|
|
SM Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
|
|
SM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM Load [0 0 0 0 0 0 0 0 ] 0
|
|
OM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OM Store [0 0 0 0 0 0 0 0 ] 0
|
|
OM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
OM L1_to_L2 [0 0 0 0 0 0 0 13 ] 13
|
|
OM Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
OM Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
OM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
OM Ack [7 0 0 0 7 0 0 7 ] 21
|
|
OM All_acks [0 0 0 0 0 0 0 0 ] 0
|
|
OM All_acks_no_sharers [1 0 0 0 1 0 0 1 ] 3
|
|
OM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ISM Load [0 0 0 0 0 0 0 0 ] 0
|
|
ISM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
ISM Store [0 0 0 0 0 0 0 0 ] 0
|
|
ISM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
ISM L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
ISM Ack [58 54 68 50 31 53 52 46 ] 412
|
|
ISM All_acks_no_sharers [1929 2066 2031 2072 2069 2052 2099 2012 ] 16330
|
|
ISM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
M_W Load [0 0 0 0 0 0 0 0 ] 0
|
|
M_W Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
M_W Store [0 0 0 0 0 0 0 0 ] 0
|
|
M_W L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
M_W L1_to_L2 [994 718 1142 762 991 1066 1127 778 ] 7578
|
|
M_W Ack [3458 3248 3349 3427 3360 3463 3583 3564 ] 27452
|
|
M_W All_acks_no_sharers [93799 93440 93964 93729 93370 94039 94228 93430 ] 749999
|
|
M_W Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_W Load [0 0 0 0 0 0 0 0 ] 0
|
|
MM_W Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MM_W Store [0 0 0 0 0 0 0 0 ] 0
|
|
MM_W L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MM_W L1_to_L2 [1382 1263 1531 1493 1433 1255 1257 1341 ] 10955
|
|
MM_W Ack [5290 5194 5079 4959 5239 5042 5253 5299 ] 41355
|
|
MM_W All_acks_no_sharers [51379 51729 51499 51349 51439 51483 51599 51814 ] 412291
|
|
MM_W Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IS Load [0 0 0 0 0 0 0 0 ] 0
|
|
IS Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IS Store [0 0 0 0 0 0 0 0 ] 0
|
|
IS L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
IS L1_to_L2 [1010206 1004928 1010454 1009009 1011166 1007443 1016869 1004826 ] 8074901
|
|
IS Other_GETX [5 4 6 2 7 4 6 6 ] 40
|
|
IS Other_GETS [7 8 4 9 7 9 4 6 ] 54
|
|
IS Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
IS NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IS Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
IS Ack [684433 681819 684855 683006 681420 686411 686491 681177 ] 5469612
|
|
IS Shared_Ack [101 109 120 118 106 114 125 101 ] 894
|
|
IS Data [3752 3738 3698 3606 3728 3826 3672 3671 ] 29691
|
|
IS Shared_Data [2109 2095 1989 2085 2106 2060 2023 2104 ] 16571
|
|
IS Exclusive_Data [93799 93440 93964 93729 93370 94039 94228 93430 ] 749999
|
|
IS Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SS Load [0 0 0 0 0 0 0 0 ] 0
|
|
SS Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
SS Store [0 0 0 0 0 0 0 0 ] 0
|
|
SS L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
SS L1_to_L2 [1601 1717 1323 1587 1673 1723 1691 1465 ] 12780
|
|
SS Ack [6325 6467 6091 6149 6251 6183 5990 6269 ] 49725
|
|
SS Shared_Ack [9 7 10 9 8 6 4 8 ] 61
|
|
SS All_acks [2206 2198 2102 2193 2204 2166 2141 2195 ] 17405
|
|
SS All_acks_no_sharers [3655 3635 3585 3498 3630 3720 3554 3580 ] 28857
|
|
SS Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OI Load [0 0 0 1 0 0 0 1 ] 2
|
|
OI Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OI Store [1 0 0 0 0 0 0 0 ] 1
|
|
OI L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
OI L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
OI Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
OI Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OI Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OI Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
OI NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OI Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
OI Writeback_Ack [2030 2065 2099 2022 2009 2026 2001 2010 ] 16262
|
|
OI Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MI Load [24 23 19 17 20 29 24 24 ] 180
|
|
MI Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MI Store [10 18 7 12 15 10 9 7 ] 88
|
|
MI L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MI L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
MI Other_GETX [3 5 1 4 5 6 1 3 ] 28
|
|
MI Other_GETS [7 11 4 6 3 9 6 8 ] 54
|
|
MI Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MI Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
MI NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MI Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
MI Writeback_Ack [142223 142286 142458 142113 141913 142602 142991 142392 ] 1138978
|
|
MI Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II Load [0 0 0 0 0 0 0 0 ] 0
|
|
II Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
II Store [0 0 0 0 0 0 0 0 ] 0
|
|
II L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
II L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
II Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
II Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
II Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
II NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
II Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
II Writeback_Ack [3 5 1 4 5 6 1 3 ] 28
|
|
II Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
|
II Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IT Load [3 2 1 3 1 1 0 2 ] 13
|
|
IT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IT Store [0 0 1 1 2 0 0 1 ] 5
|
|
IT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
IT L1_to_L2 [9 12 10 4 10 9 0 8 ] 62
|
|
IT Complete_L2_to_L1 [5 3 5 5 6 2 2 5 ] 33
|
|
IT Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
IT Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IT Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IT Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
IT NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IT Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
IT Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ST Load [2 6 1 1 3 2 3 5 ] 23
|
|
ST Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
ST Store [1 1 0 3 1 2 0 1 ] 9
|
|
ST L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
ST L1_to_L2 [14 7 2 22 49 21 8 24 ] 147
|
|
ST Complete_L2_to_L1 [8 8 5 6 4 6 4 9 ] 50
|
|
ST Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
ST Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
ST Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
ST Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
ST NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
ST Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
ST Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OT Load [0 0 1 1 2 0 0 2 ] 6
|
|
OT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OT Store [0 0 0 0 0 0 0 1 ] 1
|
|
OT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
OT L1_to_L2 [0 0 4 0 22 0 0 37 ] 63
|
|
OT Complete_L2_to_L1 [1 0 3 1 3 0 0 4 ] 12
|
|
OT Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
OT Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OT Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OT Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
OT NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OT Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
OT Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MT Load [45 29 45 36 24 46 34 42 ] 301
|
|
MT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MT Store [12 27 16 28 23 18 20 14 ] 158
|
|
MT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MT L1_to_L2 [300 270 346 325 237 422 355 271 ] 2526
|
|
MT Complete_L2_to_L1 [88 91 93 92 76 99 89 94 ] 722
|
|
MT Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
MT Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MT Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MT Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
MT NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MT Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
MT Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MMT Load [20 18 20 17 22 23 22 22 ] 164
|
|
MMT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MMT Store [14 12 9 12 14 9 8 15 ] 93
|
|
MMT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MMT L1_to_L2 [193 191 128 174 189 193 158 147 ] 1373
|
|
MMT Complete_L2_to_L1 [62 57 57 45 51 40 48 57 ] 417
|
|
MMT Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
MMT Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MMT Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MMT Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
MMT NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MMT Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
MMT Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MI_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F Writeback_Ack [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F All_acks [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F All_acks_no_sharers [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Block_Ack [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Data [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ISM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F All_acks_no_sharers [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Data [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F All_acks [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F All_acks_no_sharers [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_WF Load [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF Store [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF Ack [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF All_acks_no_sharers [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
Cache Stats: system.l1_cntrl1.L1IcacheMemory
|
|
system.l1_cntrl1.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl1.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl1.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl1.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl1.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl1.L1DcacheMemory
|
|
system.l1_cntrl1.L1DcacheMemory_total_misses: 153609
|
|
system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 153609
|
|
system.l1_cntrl1.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl1.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl1.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl1.L1DcacheMemory_request_type_LD: 65.1205%
|
|
system.l1_cntrl1.L1DcacheMemory_request_type_ST: 34.8795%
|
|
|
|
system.l1_cntrl1.L1DcacheMemory_access_mode_type_Supervisor: 153609 100%
|
|
|
|
Cache Stats: system.l1_cntrl1.L2cacheMemory
|
|
system.l1_cntrl1.L2cacheMemory_total_misses: 153609
|
|
system.l1_cntrl1.L2cacheMemory_total_demand_misses: 153609
|
|
system.l1_cntrl1.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl1.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl1.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl1.L2cacheMemory_request_type_LD: 65.1205%
|
|
system.l1_cntrl1.L2cacheMemory_request_type_ST: 34.8795%
|
|
|
|
system.l1_cntrl1.L2cacheMemory_access_mode_type_Supervisor: 153609 100%
|
|
|
|
Cache Stats: system.l1_cntrl2.L1IcacheMemory
|
|
system.l1_cntrl2.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl2.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl2.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl2.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl2.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl2.L1DcacheMemory
|
|
system.l1_cntrl2.L1DcacheMemory_total_misses: 153767
|
|
system.l1_cntrl2.L1DcacheMemory_total_demand_misses: 153767
|
|
system.l1_cntrl2.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl2.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl2.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl2.L1DcacheMemory_request_type_LD: 65.0504%
|
|
system.l1_cntrl2.L1DcacheMemory_request_type_ST: 34.9496%
|
|
|
|
system.l1_cntrl2.L1DcacheMemory_access_mode_type_Supervisor: 153767 100%
|
|
|
|
Cache Stats: system.l1_cntrl2.L2cacheMemory
|
|
system.l1_cntrl2.L2cacheMemory_total_misses: 153767
|
|
system.l1_cntrl2.L2cacheMemory_total_demand_misses: 153767
|
|
system.l1_cntrl2.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl2.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl2.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl2.L2cacheMemory_request_type_LD: 65.0504%
|
|
system.l1_cntrl2.L2cacheMemory_request_type_ST: 34.9496%
|
|
|
|
system.l1_cntrl2.L2cacheMemory_access_mode_type_Supervisor: 153767 100%
|
|
|
|
Cache Stats: system.l1_cntrl3.L1IcacheMemory
|
|
system.l1_cntrl3.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl3.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl3.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl3.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl3.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl3.L1DcacheMemory
|
|
system.l1_cntrl3.L1DcacheMemory_total_misses: 153204
|
|
system.l1_cntrl3.L1DcacheMemory_total_demand_misses: 153204
|
|
system.l1_cntrl3.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl3.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl3.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl3.L1DcacheMemory_request_type_LD: 64.8306%
|
|
system.l1_cntrl3.L1DcacheMemory_request_type_ST: 35.1694%
|
|
|
|
system.l1_cntrl3.L1DcacheMemory_access_mode_type_Supervisor: 153204 100%
|
|
|
|
Cache Stats: system.l1_cntrl3.L2cacheMemory
|
|
system.l1_cntrl3.L2cacheMemory_total_misses: 153204
|
|
system.l1_cntrl3.L2cacheMemory_total_demand_misses: 153204
|
|
system.l1_cntrl3.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl3.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl3.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl3.L2cacheMemory_request_type_LD: 64.8306%
|
|
system.l1_cntrl3.L2cacheMemory_request_type_ST: 35.1694%
|
|
|
|
system.l1_cntrl3.L2cacheMemory_access_mode_type_Supervisor: 153204 100%
|
|
|
|
Cache Stats: system.l1_cntrl4.L1IcacheMemory
|
|
system.l1_cntrl4.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl4.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl4.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl4.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl4.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl4.L1DcacheMemory
|
|
system.l1_cntrl4.L1DcacheMemory_total_misses: 153136
|
|
system.l1_cntrl4.L1DcacheMemory_total_demand_misses: 153136
|
|
system.l1_cntrl4.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl4.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl4.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl4.L1DcacheMemory_request_type_LD: 65.1552%
|
|
system.l1_cntrl4.L1DcacheMemory_request_type_ST: 34.8448%
|
|
|
|
system.l1_cntrl4.L1DcacheMemory_access_mode_type_Supervisor: 153136 100%
|
|
|
|
Cache Stats: system.l1_cntrl4.L2cacheMemory
|
|
system.l1_cntrl4.L2cacheMemory_total_misses: 153136
|
|
system.l1_cntrl4.L2cacheMemory_total_demand_misses: 153136
|
|
system.l1_cntrl4.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl4.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl4.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl4.L2cacheMemory_request_type_LD: 65.1552%
|
|
system.l1_cntrl4.L2cacheMemory_request_type_ST: 34.8448%
|
|
|
|
system.l1_cntrl4.L2cacheMemory_access_mode_type_Supervisor: 153136 100%
|
|
|
|
Cache Stats: system.l1_cntrl5.L1IcacheMemory
|
|
system.l1_cntrl5.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl5.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl5.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl5.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl5.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl5.L1DcacheMemory
|
|
system.l1_cntrl5.L1DcacheMemory_total_misses: 153231
|
|
system.l1_cntrl5.L1DcacheMemory_total_demand_misses: 153231
|
|
system.l1_cntrl5.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl5.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl5.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl5.L1DcacheMemory_request_type_LD: 64.8472%
|
|
system.l1_cntrl5.L1DcacheMemory_request_type_ST: 35.1528%
|
|
|
|
system.l1_cntrl5.L1DcacheMemory_access_mode_type_Supervisor: 153231 100%
|
|
|
|
Cache Stats: system.l1_cntrl5.L2cacheMemory
|
|
system.l1_cntrl5.L2cacheMemory_total_misses: 153231
|
|
system.l1_cntrl5.L2cacheMemory_total_demand_misses: 153231
|
|
system.l1_cntrl5.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl5.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl5.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl5.L2cacheMemory_request_type_LD: 64.8472%
|
|
system.l1_cntrl5.L2cacheMemory_request_type_ST: 35.1528%
|
|
|
|
system.l1_cntrl5.L2cacheMemory_access_mode_type_Supervisor: 153231 100%
|
|
|
|
Cache Stats: system.l1_cntrl6.L1IcacheMemory
|
|
system.l1_cntrl6.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl6.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl6.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl6.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl6.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl6.L1DcacheMemory
|
|
system.l1_cntrl6.L1DcacheMemory_total_misses: 153347
|
|
system.l1_cntrl6.L1DcacheMemory_total_demand_misses: 153347
|
|
system.l1_cntrl6.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl6.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl6.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl6.L1DcacheMemory_request_type_LD: 65.0616%
|
|
system.l1_cntrl6.L1DcacheMemory_request_type_ST: 34.9384%
|
|
|
|
system.l1_cntrl6.L1DcacheMemory_access_mode_type_Supervisor: 153347 100%
|
|
|
|
Cache Stats: system.l1_cntrl6.L2cacheMemory
|
|
system.l1_cntrl6.L2cacheMemory_total_misses: 153347
|
|
system.l1_cntrl6.L2cacheMemory_total_demand_misses: 153347
|
|
system.l1_cntrl6.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl6.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl6.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl6.L2cacheMemory_request_type_LD: 65.0616%
|
|
system.l1_cntrl6.L2cacheMemory_request_type_ST: 34.9384%
|
|
|
|
system.l1_cntrl6.L2cacheMemory_access_mode_type_Supervisor: 153347 100%
|
|
|
|
Cache Stats: system.l1_cntrl7.L1IcacheMemory
|
|
system.l1_cntrl7.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl7.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl7.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl7.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl7.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl7.L1DcacheMemory
|
|
system.l1_cntrl7.L1DcacheMemory_total_misses: 152993
|
|
system.l1_cntrl7.L1DcacheMemory_total_demand_misses: 152993
|
|
system.l1_cntrl7.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl7.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl7.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl7.L1DcacheMemory_request_type_LD: 65.0435%
|
|
system.l1_cntrl7.L1DcacheMemory_request_type_ST: 34.9565%
|
|
|
|
system.l1_cntrl7.L1DcacheMemory_access_mode_type_Supervisor: 152993 100%
|
|
|
|
Cache Stats: system.l1_cntrl7.L2cacheMemory
|
|
system.l1_cntrl7.L2cacheMemory_total_misses: 152993
|
|
system.l1_cntrl7.L2cacheMemory_total_demand_misses: 152993
|
|
system.l1_cntrl7.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl7.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl7.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl7.L2cacheMemory_request_type_LD: 65.0435%
|
|
system.l1_cntrl7.L2cacheMemory_request_type_ST: 34.9565%
|
|
|
|
system.l1_cntrl7.L2cacheMemory_access_mode_type_Supervisor: 152993 100%
|
|
|
|
Cache Stats: system.dir_cntrl0.probeFilter
|
|
system.dir_cntrl0.probeFilter_total_misses: 0
|
|
system.dir_cntrl0.probeFilter_total_demand_misses: 0
|
|
system.dir_cntrl0.probeFilter_total_prefetches: 0
|
|
system.dir_cntrl0.probeFilter_total_sw_prefetches: 0
|
|
system.dir_cntrl0.probeFilter_total_hw_prefetches: 0
|
|
|
|
|
|
Memory controller: system.dir_cntrl0.memBuffer:
|
|
memory_total_requests: 1608661
|
|
memory_reads: 1184990
|
|
memory_writes: 423650
|
|
memory_refreshes: 79470
|
|
memory_total_request_delays: 102423525
|
|
memory_delays_per_request: 63.67
|
|
memory_delays_in_input_queue: 1283104
|
|
memory_delays_behind_head_of_bank_queue: 41866272
|
|
memory_delays_stalled_at_head_of_bank_queue: 59274149
|
|
memory_stalls_for_bank_busy: 8948554
|
|
memory_stalls_for_random_busy: 0
|
|
memory_stalls_for_anti_starvation: 15045831
|
|
memory_stalls_for_arbitration: 12108818
|
|
memory_stalls_for_bus: 16419809
|
|
memory_stalls_for_tfaw: 0
|
|
memory_stalls_for_read_write_turnaround: 4060897
|
|
memory_stalls_for_read_read_turnaround: 2690240
|
|
accesses_per_bank: 50611 50527 50359 50444 50524 50779 50738 50144 50677 50479 50690 50376 50318 50356 50293 49859 50401 49972 50525 50140 50109 50092 50040 50071 50107 49811 49917 49717 50237 49945 50447 49956
|
|
|
|
--- Directory ---
|
|
- Event Counts -
|
|
GETX [435077 ] 435077
|
|
GETS [808035 ] 808035
|
|
PUT [1155740 ] 1155740
|
|
Unblock [28 ] 28
|
|
UnblockS [46262 ] 46262
|
|
UnblockM [1178622 ] 1178622
|
|
Writeback_Clean [16035 ] 16035
|
|
Writeback_Dirty [227 ] 227
|
|
Writeback_Exclusive_Clean [715549 ] 715549
|
|
Writeback_Exclusive_Dirty [423427 ] 423427
|
|
Pf_Replacement [0 ] 0
|
|
DMA_READ [0 ] 0
|
|
DMA_WRITE [0 ] 0
|
|
Memory_Data [1184984 ] 1184984
|
|
Memory_Ack [423650 ] 423650
|
|
Ack [0 ] 0
|
|
Shared_Ack [0 ] 0
|
|
Shared_Data [0 ] 0
|
|
Data [0 ] 0
|
|
Exclusive_Data [0 ] 0
|
|
All_acks_and_shared_data [0 ] 0
|
|
All_acks_and_owner_data [0 ] 0
|
|
All_acks_and_data_no_sharers [0 ] 0
|
|
All_Unblocks [72 ] 72
|
|
GETF [0 ] 0
|
|
PUTF [0 ] 0
|
|
|
|
- Transitions -
|
|
NX GETX [117 ] 117
|
|
NX GETS [174 ] 174
|
|
NX PUT [16290 ] 16290
|
|
NX Pf_Replacement [0 ] 0
|
|
NX DMA_READ [0 ] 0
|
|
NX DMA_WRITE [0 ] 0
|
|
NX GETF [0 ] 0
|
|
|
|
NO GETX [14007 ] 14007
|
|
NO GETS [25531 ] 25531
|
|
NO PUT [1138978 ] 1138978
|
|
NO Pf_Replacement [0 ] 0
|
|
NO DMA_READ [0 ] 0
|
|
NO DMA_WRITE [0 ] 0
|
|
NO GETF [0 ] 0
|
|
|
|
S GETX [0 ] 0
|
|
S GETS [0 ] 0
|
|
S PUT [0 ] 0
|
|
S Pf_Replacement [0 ] 0
|
|
S DMA_READ [0 ] 0
|
|
S DMA_WRITE [0 ] 0
|
|
S GETF [0 ] 0
|
|
|
|
O GETX [16188 ] 16188
|
|
O GETS [29693 ] 29693
|
|
O PUT [0 ] 0
|
|
O Pf_Replacement [0 ] 0
|
|
O DMA_READ [0 ] 0
|
|
O DMA_WRITE [0 ] 0
|
|
O GETF [0 ] 0
|
|
|
|
E GETX [398316 ] 398316
|
|
E GETS [740810 ] 740810
|
|
E PUT [0 ] 0
|
|
E DMA_READ [0 ] 0
|
|
E DMA_WRITE [0 ] 0
|
|
E GETF [0 ] 0
|
|
|
|
O_R GETX [0 ] 0
|
|
O_R GETS [0 ] 0
|
|
O_R PUT [0 ] 0
|
|
O_R Pf_Replacement [0 ] 0
|
|
O_R DMA_READ [0 ] 0
|
|
O_R DMA_WRITE [0 ] 0
|
|
O_R Ack [0 ] 0
|
|
O_R All_acks_and_data_no_sharers [0 ] 0
|
|
O_R GETF [0 ] 0
|
|
|
|
S_R GETX [0 ] 0
|
|
S_R GETS [0 ] 0
|
|
S_R PUT [0 ] 0
|
|
S_R Pf_Replacement [0 ] 0
|
|
S_R DMA_READ [0 ] 0
|
|
S_R DMA_WRITE [0 ] 0
|
|
S_R Ack [0 ] 0
|
|
S_R Data [0 ] 0
|
|
S_R All_acks_and_data_no_sharers [0 ] 0
|
|
S_R GETF [0 ] 0
|
|
|
|
NO_R GETX [0 ] 0
|
|
NO_R GETS [0 ] 0
|
|
NO_R PUT [0 ] 0
|
|
NO_R Pf_Replacement [0 ] 0
|
|
NO_R DMA_READ [0 ] 0
|
|
NO_R DMA_WRITE [0 ] 0
|
|
NO_R Ack [0 ] 0
|
|
NO_R Data [0 ] 0
|
|
NO_R Exclusive_Data [0 ] 0
|
|
NO_R All_acks_and_data_no_sharers [0 ] 0
|
|
NO_R GETF [0 ] 0
|
|
|
|
NO_B GETX [48 ] 48
|
|
NO_B GETS [72 ] 72
|
|
NO_B PUT [472 ] 472
|
|
NO_B UnblockS [16461 ] 16461
|
|
NO_B UnblockM [1178540 ] 1178540
|
|
NO_B Pf_Replacement [0 ] 0
|
|
NO_B DMA_READ [0 ] 0
|
|
NO_B DMA_WRITE [0 ] 0
|
|
NO_B GETF [0 ] 0
|
|
|
|
NO_B_X GETX [0 ] 0
|
|
NO_B_X GETS [1 ] 1
|
|
NO_B_X PUT [0 ] 0
|
|
NO_B_X UnblockS [20 ] 20
|
|
NO_B_X UnblockM [28 ] 28
|
|
NO_B_X Pf_Replacement [0 ] 0
|
|
NO_B_X DMA_READ [0 ] 0
|
|
NO_B_X DMA_WRITE [0 ] 0
|
|
NO_B_X GETF [0 ] 0
|
|
|
|
NO_B_S GETX [0 ] 0
|
|
NO_B_S GETS [0 ] 0
|
|
NO_B_S PUT [0 ] 0
|
|
NO_B_S UnblockS [18 ] 18
|
|
NO_B_S UnblockM [54 ] 54
|
|
NO_B_S Pf_Replacement [0 ] 0
|
|
NO_B_S DMA_READ [0 ] 0
|
|
NO_B_S DMA_WRITE [0 ] 0
|
|
NO_B_S GETF [0 ] 0
|
|
|
|
NO_B_S_W GETX [0 ] 0
|
|
NO_B_S_W GETS [0 ] 0
|
|
NO_B_S_W PUT [0 ] 0
|
|
NO_B_S_W UnblockS [72 ] 72
|
|
NO_B_S_W Pf_Replacement [0 ] 0
|
|
NO_B_S_W DMA_READ [0 ] 0
|
|
NO_B_S_W DMA_WRITE [0 ] 0
|
|
NO_B_S_W All_Unblocks [72 ] 72
|
|
NO_B_S_W GETF [0 ] 0
|
|
|
|
O_B GETX [0 ] 0
|
|
O_B GETS [0 ] 0
|
|
O_B PUT [0 ] 0
|
|
O_B UnblockS [29691 ] 29691
|
|
O_B UnblockM [0 ] 0
|
|
O_B Pf_Replacement [0 ] 0
|
|
O_B DMA_READ [0 ] 0
|
|
O_B DMA_WRITE [0 ] 0
|
|
O_B GETF [0 ] 0
|
|
|
|
NO_B_W GETX [3962 ] 3962
|
|
NO_B_W GETS [7273 ] 7273
|
|
NO_B_W PUT [0 ] 0
|
|
NO_B_W UnblockS [0 ] 0
|
|
NO_B_W UnblockM [0 ] 0
|
|
NO_B_W Pf_Replacement [0 ] 0
|
|
NO_B_W DMA_READ [0 ] 0
|
|
NO_B_W DMA_WRITE [0 ] 0
|
|
NO_B_W Memory_Data [1155293 ] 1155293
|
|
NO_B_W GETF [0 ] 0
|
|
|
|
O_B_W GETX [116 ] 116
|
|
O_B_W GETS [203 ] 203
|
|
O_B_W PUT [0 ] 0
|
|
O_B_W UnblockS [0 ] 0
|
|
O_B_W Pf_Replacement [0 ] 0
|
|
O_B_W DMA_READ [0 ] 0
|
|
O_B_W DMA_WRITE [0 ] 0
|
|
O_B_W Memory_Data [29691 ] 29691
|
|
O_B_W GETF [0 ] 0
|
|
|
|
NO_W GETX [0 ] 0
|
|
NO_W GETS [0 ] 0
|
|
NO_W PUT [0 ] 0
|
|
NO_W Pf_Replacement [0 ] 0
|
|
NO_W DMA_READ [0 ] 0
|
|
NO_W DMA_WRITE [0 ] 0
|
|
NO_W Memory_Data [0 ] 0
|
|
NO_W GETF [0 ] 0
|
|
|
|
O_W GETX [0 ] 0
|
|
O_W GETS [0 ] 0
|
|
O_W PUT [0 ] 0
|
|
O_W Pf_Replacement [0 ] 0
|
|
O_W DMA_READ [0 ] 0
|
|
O_W DMA_WRITE [0 ] 0
|
|
O_W Memory_Data [0 ] 0
|
|
O_W GETF [0 ] 0
|
|
|
|
NO_DW_B_W GETX [0 ] 0
|
|
NO_DW_B_W GETS [0 ] 0
|
|
NO_DW_B_W PUT [0 ] 0
|
|
NO_DW_B_W Pf_Replacement [0 ] 0
|
|
NO_DW_B_W DMA_READ [0 ] 0
|
|
NO_DW_B_W DMA_WRITE [0 ] 0
|
|
NO_DW_B_W Ack [0 ] 0
|
|
NO_DW_B_W Data [0 ] 0
|
|
NO_DW_B_W Exclusive_Data [0 ] 0
|
|
NO_DW_B_W All_acks_and_data_no_sharers [0 ] 0
|
|
NO_DW_B_W GETF [0 ] 0
|
|
|
|
NO_DR_B_W GETX [0 ] 0
|
|
NO_DR_B_W GETS [0 ] 0
|
|
NO_DR_B_W PUT [0 ] 0
|
|
NO_DR_B_W Pf_Replacement [0 ] 0
|
|
NO_DR_B_W DMA_READ [0 ] 0
|
|
NO_DR_B_W DMA_WRITE [0 ] 0
|
|
NO_DR_B_W Memory_Data [0 ] 0
|
|
NO_DR_B_W Ack [0 ] 0
|
|
NO_DR_B_W Shared_Ack [0 ] 0
|
|
NO_DR_B_W Shared_Data [0 ] 0
|
|
NO_DR_B_W Data [0 ] 0
|
|
NO_DR_B_W Exclusive_Data [0 ] 0
|
|
NO_DR_B_W GETF [0 ] 0
|
|
|
|
NO_DR_B_D GETX [0 ] 0
|
|
NO_DR_B_D GETS [0 ] 0
|
|
NO_DR_B_D PUT [0 ] 0
|
|
NO_DR_B_D Pf_Replacement [0 ] 0
|
|
NO_DR_B_D DMA_READ [0 ] 0
|
|
NO_DR_B_D DMA_WRITE [0 ] 0
|
|
NO_DR_B_D Ack [0 ] 0
|
|
NO_DR_B_D Shared_Ack [0 ] 0
|
|
NO_DR_B_D Shared_Data [0 ] 0
|
|
NO_DR_B_D Data [0 ] 0
|
|
NO_DR_B_D Exclusive_Data [0 ] 0
|
|
NO_DR_B_D All_acks_and_shared_data [0 ] 0
|
|
NO_DR_B_D All_acks_and_owner_data [0 ] 0
|
|
NO_DR_B_D All_acks_and_data_no_sharers [0 ] 0
|
|
NO_DR_B_D GETF [0 ] 0
|
|
|
|
NO_DR_B GETX [0 ] 0
|
|
NO_DR_B GETS [0 ] 0
|
|
NO_DR_B PUT [0 ] 0
|
|
NO_DR_B Pf_Replacement [0 ] 0
|
|
NO_DR_B DMA_READ [0 ] 0
|
|
NO_DR_B DMA_WRITE [0 ] 0
|
|
NO_DR_B Ack [0 ] 0
|
|
NO_DR_B Shared_Ack [0 ] 0
|
|
NO_DR_B Shared_Data [0 ] 0
|
|
NO_DR_B Data [0 ] 0
|
|
NO_DR_B Exclusive_Data [0 ] 0
|
|
NO_DR_B All_acks_and_shared_data [0 ] 0
|
|
NO_DR_B All_acks_and_owner_data [0 ] 0
|
|
NO_DR_B All_acks_and_data_no_sharers [0 ] 0
|
|
NO_DR_B GETF [0 ] 0
|
|
|
|
NO_DW_W GETX [0 ] 0
|
|
NO_DW_W GETS [0 ] 0
|
|
NO_DW_W PUT [0 ] 0
|
|
NO_DW_W Pf_Replacement [0 ] 0
|
|
NO_DW_W DMA_READ [0 ] 0
|
|
NO_DW_W DMA_WRITE [0 ] 0
|
|
NO_DW_W Memory_Ack [0 ] 0
|
|
NO_DW_W GETF [0 ] 0
|
|
|
|
O_DR_B_W GETX [0 ] 0
|
|
O_DR_B_W GETS [0 ] 0
|
|
O_DR_B_W PUT [0 ] 0
|
|
O_DR_B_W Pf_Replacement [0 ] 0
|
|
O_DR_B_W DMA_READ [0 ] 0
|
|
O_DR_B_W DMA_WRITE [0 ] 0
|
|
O_DR_B_W Memory_Data [0 ] 0
|
|
O_DR_B_W Ack [0 ] 0
|
|
O_DR_B_W Shared_Ack [0 ] 0
|
|
O_DR_B_W GETF [0 ] 0
|
|
|
|
O_DR_B GETX [0 ] 0
|
|
O_DR_B GETS [0 ] 0
|
|
O_DR_B PUT [0 ] 0
|
|
O_DR_B Pf_Replacement [0 ] 0
|
|
O_DR_B DMA_READ [0 ] 0
|
|
O_DR_B DMA_WRITE [0 ] 0
|
|
O_DR_B Ack [0 ] 0
|
|
O_DR_B Shared_Ack [0 ] 0
|
|
O_DR_B All_acks_and_owner_data [0 ] 0
|
|
O_DR_B All_acks_and_data_no_sharers [0 ] 0
|
|
O_DR_B GETF [0 ] 0
|
|
|
|
WB GETX [166 ] 166
|
|
WB GETS [349 ] 349
|
|
WB PUT [0 ] 0
|
|
WB Unblock [28 ] 28
|
|
WB Writeback_Clean [16035 ] 16035
|
|
WB Writeback_Dirty [227 ] 227
|
|
WB Writeback_Exclusive_Clean [715549 ] 715549
|
|
WB Writeback_Exclusive_Dirty [423427 ] 423427
|
|
WB Pf_Replacement [0 ] 0
|
|
WB DMA_READ [0 ] 0
|
|
WB DMA_WRITE [0 ] 0
|
|
WB GETF [0 ] 0
|
|
|
|
WB_O_W GETX [2 ] 2
|
|
WB_O_W GETS [3 ] 3
|
|
WB_O_W PUT [0 ] 0
|
|
WB_O_W Pf_Replacement [0 ] 0
|
|
WB_O_W DMA_READ [0 ] 0
|
|
WB_O_W DMA_WRITE [0 ] 0
|
|
WB_O_W Memory_Ack [227 ] 227
|
|
WB_O_W GETF [0 ] 0
|
|
|
|
WB_E_W GETX [2155 ] 2155
|
|
WB_E_W GETS [3926 ] 3926
|
|
WB_E_W PUT [0 ] 0
|
|
WB_E_W Pf_Replacement [0 ] 0
|
|
WB_E_W DMA_READ [0 ] 0
|
|
WB_E_W DMA_WRITE [0 ] 0
|
|
WB_E_W Memory_Ack [423423 ] 423423
|
|
WB_E_W GETF [0 ] 0
|
|
|
|
NO_F GETX [0 ] 0
|
|
NO_F GETS [0 ] 0
|
|
NO_F PUT [0 ] 0
|
|
NO_F UnblockM [0 ] 0
|
|
NO_F Pf_Replacement [0 ] 0
|
|
NO_F GETF [0 ] 0
|
|
NO_F PUTF [0 ] 0
|
|
|
|
NO_F_W GETX [0 ] 0
|
|
NO_F_W GETS [0 ] 0
|
|
NO_F_W PUT [0 ] 0
|
|
NO_F_W Pf_Replacement [0 ] 0
|
|
NO_F_W DMA_READ [0 ] 0
|
|
NO_F_W DMA_WRITE [0 ] 0
|
|
NO_F_W Memory_Data [0 ] 0
|
|
NO_F_W GETF |