13c005a8af
--HG-- rename : cpu/base_cpu.cc => cpu/base.cc rename : cpu/base_cpu.hh => cpu/base.hh rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh rename : cpu/full_cpu/smt.hh => cpu/smt.hh rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
217 lines
5.6 KiB
C++
217 lines
5.6 KiB
C++
/*
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* Copyright (c) 2001-2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <string>
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#include "cpu/base.hh"
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#include "cpu/exec_context.hh"
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#ifdef FULL_SYSTEM
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#include "base/cprintf.hh"
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#include "kern/kernel_stats.hh"
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#include "sim/serialize.hh"
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#include "sim/system.hh"
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#else
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#include "sim/process.hh"
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#endif
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using namespace std;
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// constructor
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#ifdef FULL_SYSTEM
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ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
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AlphaITB *_itb, AlphaDTB *_dtb,
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FunctionalMemory *_mem)
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: _status(ExecContext::Unallocated), cpu(_cpu), thread_num(_thread_num),
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cpu_id(-1), mem(_mem), itb(_itb), dtb(_dtb), system(_sys),
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memctrl(_sys->memctrl), physmem(_sys->physmem),
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kernelBinning(system->kernelBinning), bin(kernelBinning->bin),
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fnbin(kernelBinning->fnbin), func_exe_inst(0), storeCondFailures(0)
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{
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kernelStats = new Kernel::Statistics(this);
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memset(®s, 0, sizeof(RegFile));
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}
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#else
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ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num,
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Process *_process, int _asid)
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: _status(ExecContext::Unallocated),
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cpu(_cpu), thread_num(_thread_num), cpu_id(-1),
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process(_process), mem(process->getMemory()), asid(_asid),
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func_exe_inst(0), storeCondFailures(0)
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{
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memset(®s, 0, sizeof(RegFile));
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}
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ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num,
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FunctionalMemory *_mem, int _asid)
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: cpu(_cpu), thread_num(_thread_num), process(0), mem(_mem), asid(_asid),
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func_exe_inst(0), storeCondFailures(0)
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{
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memset(®s, 0, sizeof(RegFile));
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}
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#endif
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ExecContext::~ExecContext()
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{
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#ifdef FULL_SYSTEM
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delete kernelStats;
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#endif
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}
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void
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ExecContext::takeOverFrom(ExecContext *oldContext)
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{
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// some things should already be set up
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assert(mem == oldContext->mem);
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#ifdef FULL_SYSTEM
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assert(system == oldContext->system);
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#else
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assert(process == oldContext->process);
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#endif
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// copy over functional state
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_status = oldContext->_status;
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regs = oldContext->regs;
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cpu_id = oldContext->cpu_id;
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func_exe_inst = oldContext->func_exe_inst;
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storeCondFailures = 0;
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oldContext->_status = ExecContext::Unallocated;
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}
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#ifdef FULL_SYSTEM
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void
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ExecContext::execute(const StaticInstBase *inst)
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{
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assert(kernelStats);
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system->kernelBinning->execute(this, inst);
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}
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#endif
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void
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ExecContext::serialize(ostream &os)
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{
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SERIALIZE_ENUM(_status);
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regs.serialize(os);
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// thread_num and cpu_id are deterministic from the config
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SERIALIZE_SCALAR(func_exe_inst);
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SERIALIZE_SCALAR(inst);
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#ifdef FULL_SYSTEM
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kernelStats->serialize(os);
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#endif
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}
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void
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ExecContext::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_ENUM(_status);
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regs.unserialize(cp, section);
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// thread_num and cpu_id are deterministic from the config
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UNSERIALIZE_SCALAR(func_exe_inst);
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UNSERIALIZE_SCALAR(inst);
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#ifdef FULL_SYSTEM
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kernelStats->unserialize(cp, section);
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#endif
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}
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void
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ExecContext::activate(int delay)
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{
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if (status() == Active)
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return;
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_status = Active;
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cpu->activateContext(thread_num, delay);
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}
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void
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ExecContext::suspend()
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{
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if (status() == Suspended)
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return;
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#ifdef FULL_SYSTEM
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// Don't change the status from active if there are pending interrupts
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if (cpu->check_interrupts()) {
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assert(status() == Active);
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return;
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}
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#endif
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_status = Suspended;
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cpu->suspendContext(thread_num);
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}
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void
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ExecContext::deallocate()
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{
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if (status() == Unallocated)
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return;
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_status = Unallocated;
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cpu->deallocateContext(thread_num);
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}
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void
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ExecContext::halt()
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{
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if (status() == Halted)
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return;
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_status = Halted;
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cpu->haltContext(thread_num);
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}
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void
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ExecContext::regStats(const string &name)
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{
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#ifdef FULL_SYSTEM
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kernelStats->regStats(name + ".kern");
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#endif
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}
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void
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ExecContext::trap(Fault fault)
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{
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//TheISA::trap(fault); //One possible way to do it...
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/** @todo: Going to hack it for now. Do a true fixup later. */
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#ifdef FULL_SYSTEM
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ev5_trap(fault);
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#else
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fatal("fault (%d) detected @ PC 0x%08p", fault, readPC());
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#endif
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}
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