2f316082e4
arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_linux_process.hh: arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: arch/alpha/alpha_tru64_process.cc: arch/alpha/alpha_tru64_process.hh: arch/alpha/aout_machdep.h: arch/alpha/arguments.cc: arch/alpha/arguments.hh: arch/alpha/faults.cc: arch/alpha/faults.hh: arch/alpha/isa_traits.hh: arch/alpha/osfpal.cc: arch/alpha/osfpal.hh: arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: arch/alpha/vptr.hh: arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: base/bitfield.hh: base/callback.hh: base/circlebuf.cc: base/circlebuf.hh: base/compression/lzss_compression.cc: base/compression/lzss_compression.hh: base/compression/null_compression.hh: base/cprintf.cc: base/cprintf.hh: base/cprintf_formats.hh: base/date.cc: base/dbl_list.hh: base/endian.hh: base/fast_alloc.cc: base/fast_alloc.hh: base/fifo_buffer.cc: base/fifo_buffer.hh: base/hashmap.hh: base/hostinfo.cc: base/hostinfo.hh: base/hybrid_pred.cc: base/hybrid_pred.hh: base/inet.cc: base/inet.hh: base/inifile.cc: base/inifile.hh: base/intmath.cc: base/intmath.hh: base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/object_file.cc: base/loader/object_file.hh: base/loader/symtab.cc: base/loader/symtab.hh: base/misc.cc: base/misc.hh: base/mod_num.hh: base/mysql.cc: base/mysql.hh: base/pollevent.cc: base/pollevent.hh: base/predictor.hh: base/random.cc: base/random.hh: base/range.cc: base/range.hh: base/refcnt.hh: base/remote_gdb.cc: base/remote_gdb.hh: base/res_list.hh: base/sat_counter.cc: base/sat_counter.hh: base/sched_list.hh: base/socket.cc: base/socket.hh: base/statistics.cc: base/statistics.hh: base/stats/events.cc: base/stats/events.hh: base/stats/flags.hh: base/stats/mysql.cc: base/stats/mysql.hh: base/stats/mysql_run.hh: base/stats/output.hh: base/stats/statdb.cc: base/stats/statdb.hh: base/stats/text.cc: base/stats/text.hh: base/stats/types.hh: base/stats/visit.cc: base/stats/visit.hh: base/str.cc: base/str.hh: base/time.cc: base/time.hh: base/trace.cc: base/trace.hh: base/userinfo.cc: base/userinfo.hh: cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/exetrace.cc: cpu/exetrace.hh: cpu/full_cpu/op_class.hh: cpu/full_cpu/smt.hh: cpu/inst_seq.hh: cpu/intr_control.cc: cpu/intr_control.hh: cpu/memtest/memtest.cc: cpu/memtest/memtest.hh: cpu/pc_event.cc: cpu/pc_event.hh: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: cpu/static_inst.cc: cpu/static_inst.hh: dev/alpha_console.cc: dev/alpha_console.hh: dev/baddev.cc: dev/baddev.hh: dev/disk_image.cc: dev/disk_image.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.cc: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.cc: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/io_device.cc: dev/io_device.hh: dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/pcireg.h: dev/platform.cc: dev/platform.hh: dev/simple_disk.cc: dev/simple_disk.hh: dev/tsunami.cc: dev/tsunami.hh: dev/tsunami_cchip.cc: dev/tsunami_cchip.hh: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: dev/tsunami_uart.hh: dev/tsunamireg.h: docs/stl.hh: kern/linux/linux.hh: kern/linux/linux_syscalls.cc: kern/linux/linux_syscalls.hh: kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/system_events.cc: kern/system_events.hh: kern/tru64/dump_mbuf.cc: kern/tru64/dump_mbuf.hh: kern/tru64/mbuf.hh: kern/tru64/printf.cc: kern/tru64/printf.hh: kern/tru64/tru64.hh: kern/tru64/tru64_events.cc: kern/tru64/tru64_events.hh: kern/tru64/tru64_syscalls.cc: kern/tru64/tru64_syscalls.hh: kern/tru64/tru64_system.cc: kern/tru64/tru64_system.hh: sim/async.hh: sim/builder.cc: sim/builder.hh: sim/debug.cc: sim/debug.hh: sim/eventq.cc: sim/eventq.hh: sim/host.hh: sim/main.cc: sim/param.cc: sim/param.hh: sim/process.cc: sim/process.hh: sim/serialize.cc: sim/serialize.hh: sim/sim_events.cc: sim/sim_events.hh: sim/sim_exit.hh: sim/sim_object.cc: sim/sim_object.hh: sim/stat_control.cc: sim/stat_control.hh: sim/stats.hh: sim/syscall_emul.cc: sim/syscall_emul.hh: sim/system.cc: sim/system.hh: sim/universe.cc: test/bitvectest.cc: test/circletest.cc: test/cprintftest.cc: test/initest.cc: test/lru_test.cc: test/nmtest.cc: test/offtest.cc: test/paramtest.cc: test/rangetest.cc: test/sized_test.cc: test/stattest.cc: test/strnumtest.cc: test/symtest.cc: test/tokentest.cc: test/tracetest.cc: util/m5/m5.c: util/m5/m5op.h: util/tap/tap.cc: Updated Copyright dev/console.cc: dev/console.hh: This code isn't ours, and shouldn't have our copyright --HG-- extra : convert_revision : 598f2e5eab5d5d3de2c1e862b389086e3212f7c4
192 lines
6.2 KiB
C++
192 lines
6.2 KiB
C++
/*
|
|
* Copyright (c) 2001-2004 The Regents of The University of Michigan
|
|
* All rights reserved.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions are
|
|
* met: redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer;
|
|
* redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution;
|
|
* neither the name of the copyright holders nor the names of its
|
|
* contributors may be used to endorse or promote products derived from
|
|
* this software without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
*/
|
|
|
|
#ifndef __PROCESS_HH__
|
|
#define __PROCESS_HH__
|
|
|
|
//
|
|
// The purpose of this code is to fake the loader & syscall mechanism
|
|
// when there's no OS: thus there's no reason to use it in FULL_SYSTEM
|
|
// mode when we do have an OS.
|
|
//
|
|
#ifndef FULL_SYSTEM
|
|
|
|
#include <vector>
|
|
|
|
#include "targetarch/isa_traits.hh"
|
|
#include "sim/sim_object.hh"
|
|
#include "sim/stats.hh"
|
|
#include "base/statistics.hh"
|
|
|
|
class ExecContext;
|
|
class FunctionalMemory;
|
|
class Process : public SimObject
|
|
{
|
|
public:
|
|
|
|
// have we initialized an execution context from this process? If
|
|
// yes, subsequent contexts are assumed to be for dynamically
|
|
// created threads and are not initialized.
|
|
bool initialContextLoaded;
|
|
|
|
// execution contexts associated with this process
|
|
std::vector<ExecContext *> execContexts;
|
|
|
|
// number of CPUs (esxec contexts, really) assigned to this process.
|
|
unsigned int numCpus() { return execContexts.size(); }
|
|
|
|
// record of blocked context
|
|
struct WaitRec
|
|
{
|
|
Addr waitChan;
|
|
ExecContext *waitingContext;
|
|
|
|
WaitRec(Addr chan, ExecContext *ctx)
|
|
: waitChan(chan), waitingContext(ctx)
|
|
{
|
|
}
|
|
};
|
|
|
|
// list of all blocked contexts
|
|
std::list<WaitRec> waitList;
|
|
|
|
RegFile *init_regs; // initial register contents
|
|
|
|
Addr text_base; // text (code) segment base
|
|
unsigned text_size; // text (code) size in bytes
|
|
|
|
Addr data_base; // initialized data segment base
|
|
unsigned data_size; // initialized data + bss size in bytes
|
|
|
|
Addr brk_point; // top of the data segment
|
|
|
|
Addr stack_base; // stack segment base (highest address)
|
|
unsigned stack_size; // initial stack size
|
|
Addr stack_min; // lowest address accessed on the stack
|
|
|
|
// addr to use for next stack region (for multithreaded apps)
|
|
Addr next_thread_stack_base;
|
|
|
|
// Base of region for mmaps (when user doesn't specify an address).
|
|
Addr mmap_base;
|
|
|
|
std::string prog_fname; // file name
|
|
Addr prog_entry; // entry point (initial PC)
|
|
|
|
Stats::Scalar<> num_syscalls; // number of syscalls executed
|
|
|
|
|
|
protected:
|
|
// constructor
|
|
Process(const std::string &name,
|
|
int stdin_fd, // initial I/O descriptors
|
|
int stdout_fd,
|
|
int stderr_fd);
|
|
|
|
|
|
protected:
|
|
FunctionalMemory *memory;
|
|
|
|
private:
|
|
// file descriptor remapping support
|
|
static const int MAX_FD = 100; // max legal fd value
|
|
int fd_map[MAX_FD+1];
|
|
|
|
public:
|
|
// static helper functions to generate file descriptors for constructor
|
|
static int openInputFile(const std::string &filename);
|
|
static int openOutputFile(const std::string &filename);
|
|
|
|
// override of virtual SimObject method: register statistics
|
|
virtual void regStats();
|
|
|
|
// register an execution context for this process.
|
|
// returns xc's cpu number (index into execContexts[])
|
|
int registerExecContext(ExecContext *xc);
|
|
|
|
|
|
void replaceExecContext(int xcIndex, ExecContext *xc);
|
|
|
|
// map simulator fd sim_fd to target fd tgt_fd
|
|
void dup_fd(int sim_fd, int tgt_fd);
|
|
|
|
// generate new target fd for sim_fd
|
|
int open_fd(int sim_fd);
|
|
|
|
// look up simulator fd for given target fd
|
|
int sim_fd(int tgt_fd);
|
|
|
|
// is this a valid instruction fetch address?
|
|
bool validInstAddr(Addr addr)
|
|
{
|
|
return (text_base <= addr &&
|
|
addr < text_base + text_size &&
|
|
!(addr & (sizeof(MachInst)-1)));
|
|
}
|
|
|
|
// is this a valid address? (used to filter data fetches)
|
|
// note that we just assume stack size <= 16MB
|
|
// this may be alpha-specific
|
|
bool validDataAddr(Addr addr)
|
|
{
|
|
return ((data_base <= addr && addr < brk_point) ||
|
|
((stack_base - 16*1024*1024) <= addr && addr < stack_base) ||
|
|
(text_base <= addr && addr < (text_base + text_size)));
|
|
}
|
|
|
|
virtual void syscall(ExecContext *xc) = 0;
|
|
|
|
virtual FunctionalMemory *getMemory() { return memory; }
|
|
};
|
|
|
|
//
|
|
// "Live" process with system calls redirected to host system
|
|
//
|
|
class ObjectFile;
|
|
class LiveProcess : public Process
|
|
{
|
|
protected:
|
|
LiveProcess(const std::string &name, ObjectFile *objFile,
|
|
int stdin_fd, int stdout_fd, int stderr_fd,
|
|
std::vector<std::string> &argv,
|
|
std::vector<std::string> &envp);
|
|
|
|
public:
|
|
// this function is used to create the LiveProcess object, since
|
|
// we can't tell which subclass of LiveProcess to use until we
|
|
// open and look at the object file.
|
|
static LiveProcess *create(const std::string &name,
|
|
int stdin_fd, int stdout_fd, int stderr_fd,
|
|
std::vector<std::string> &argv,
|
|
std::vector<std::string> &envp);
|
|
};
|
|
|
|
|
|
#endif // !FULL_SYSTEM
|
|
|
|
#endif // __PROCESS_HH__
|